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| author |  Alexey Kardashevskiy <aik@amd.com>
| 2023-01-20 14:10:45 +1100 |
|---|---|---|
| committer |  Borislav Petkov (AMD) <bp@alien8.de>
| 2023-01-31 20:09:26 +0100 |
| commit | 7914695743d598b189d549f2f57af24aa5633705 (patch) | |
| tree | 801a28c227627f0d97a408d65a0f195fa2648137 /arch/x86/kernel/hw_breakpoint.c | |
| parent | KVM: x86: Propagate the AMD Automatic IBRS feature to the guest (diff) | |
| download | linux-7914695743d598b189d549f2f57af24aa5633705.tar.gz linux-7914695743d598b189d549f2f57af24aa5633705.tar.bz2 linux-7914695743d598b189d549f2f57af24aa5633705.zip | |
x86/amd: Cache debug register values in percpu variables
Reading DR[0-3]_ADDR_MASK MSRs takes about 250 cycles which is going to
be noticeable with the AMD KVM SEV-ES DebugSwap feature enabled. KVM is
going to store host's DR[0-3] and DR[0-3]_ADDR_MASK before switching to
a guest; the hardware is going to swap these on VMRUN and VMEXIT.
Store MSR values passed to set_dr_addr_mask() in percpu variables
(when changed) and return them via new amd_get_dr_addr_mask().
The gain here is about 10x.
As set_dr_addr_mask() uses the array too, change the @dr type to
unsigned to avoid checking for <0. And give it the amd_ prefix to match
the new helper as the whole DR_ADDR_MASK feature is AMD-specific anyway.
While at it, replace deprecated boot_cpu_has() with cpu_feature_enabled()
in set_dr_addr_mask().
Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230120031047.628097-2-aik@amd.com
Diffstat (limited to 'arch/x86/kernel/hw_breakpoint.c')
| -rw-r--r-- | arch/x86/kernel/hw_breakpoint.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c index bbb0f737aab1..b01644c949b2 100644 --- a/arch/x86/kernel/hw_breakpoint.c +++ b/arch/x86/kernel/hw_breakpoint.c @@ -127,7 +127,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp) set_debugreg(*dr7, 7); if (info->mask) - set_dr_addr_mask(info->mask, i); + amd_set_dr_addr_mask(info->mask, i); return 0; } @@ -166,7 +166,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp) set_debugreg(dr7, 7); if (info->mask) - set_dr_addr_mask(0, i); + amd_set_dr_addr_mask(0, i); /* * Ensure the write to cpu_dr7 is after we've set the DR7 register. |