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author | 2021-04-12 16:21:34 +1200 | |
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committer | 2021-04-20 04:18:54 -0400 | |
commit | 00e7646c3563d2f1a46a8fa1824c32373d77a8be (patch) | |
tree | 4cf6b3295893100ee241724d21a99804cbfa03fd /arch/x86/kvm/cpuid.h | |
parent | KVM: x86: Export kvm_mmu_gva_to_gpa_{read,write}() for SGX (VMX) (diff) | |
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KVM: x86: Define new #PF SGX error code bit
Page faults that are signaled by the SGX Enclave Page Cache Map (EPCM),
as opposed to the traditional IA32/EPT page tables, set an SGX bit in
the error code to indicate that the #PF was induced by SGX. KVM will
need to emulate this behavior as part of its trap-and-execute scheme for
virtualizing SGX Launch Control, e.g. to inject SGX-induced #PFs if
EINIT faults in the host, and to support live migration.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Kai Huang <kai.huang@intel.com>
Message-Id: <e170c5175cb9f35f53218a7512c9e3db972b97a2.1618196135.git.kai.huang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/cpuid.h')
0 files changed, 0 insertions, 0 deletions