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authorGravatar Like Xu <likexu@tencent.com> 2022-11-09 16:28:02 +0800
committerGravatar Sean Christopherson <seanjc@google.com> 2023-02-01 16:42:36 -0800
commit13738a3647368f7f600b30d241779bcd2a3ebbfd (patch)
tree6aac03a4d93428f2bb5a6e4c7ced17df548b1a9d /arch/x86/kvm/pmu.c
parentKVM: x86/pmu: Add PRIR++ and PDist support for SPR and later models (diff)
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perf/x86/intel: Expose EPT-friendly PEBS for SPR and future models
According to Intel SDM, the EPT-friendly PEBS is supported by all the platforms after ICX, ADL and the future platforms with PEBS format 5. Currently the only in-kernel user of this capability is KVM, which has very limited support for hybrid core pmu, so ADL and its successors do not currently expose this capability. When both hybrid core and PEBS format 5 are present, KVM will decide on its own merits. Cc: Peter Zijlstra <peterz@infradead.org> Cc: linux-perf-users@vger.kernel.org Suggested-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Like Xu <likexu@tencent.com> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20221109082802.27543-4-likexu@tencent.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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