diff options
| author |  Christoph Lameter <christoph@lameter.com>
| 2005-07-07 17:56:59 -0700 |
|---|---|---|
| committer |  Linus Torvalds <torvalds@g5.osdl.org>
| 2005-07-07 18:23:46 -0700 |
| commit | 6c036527a630720063b67d9a65455e8caca2c8fa (patch) | |
| tree | 316e947f5f4efcda0205e48044ed1d12665eaed1 /arch/x86_64 | |
| parent | [PATCH] propagate __nocast annotations (diff) | |
| download | linux-6c036527a630720063b67d9a65455e8caca2c8fa.tar.gz linux-6c036527a630720063b67d9a65455e8caca2c8fa.tar.bz2 linux-6c036527a630720063b67d9a65455e8caca2c8fa.zip | |
[PATCH] mostly_read data section
Add a new section called ".data.read_mostly" for data items that are read
frequently and rarely written to like cpumaps etc.
If these maps are placed in the .data section then these frequenly read
items may end up in cachelines with data is is frequently updated. In that
case all processors in an SMP system must needlessly reload the cachelines
again and again containing elements of those frequently used variables.
The ability to share these cachelines will allow each cpu in an SMP system
to keep local copies of those shared cachelines thereby optimizing
performance.
Signed-off-by: Alok N Kataria <alokk@calsoftinc.com>
Signed-off-by: Shobhit Dayal <shobhit@calsoftinc.com>
Signed-off-by: Christoph Lameter <christoph@scalex86.org>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64')
| -rw-r--r-- | arch/x86_64/kernel/vmlinux.lds.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86_64/kernel/vmlinux.lds.S b/arch/x86_64/kernel/vmlinux.lds.S index 73389f51c4e5..61c12758ca70 100644 --- a/arch/x86_64/kernel/vmlinux.lds.S +++ b/arch/x86_64/kernel/vmlinux.lds.S @@ -56,6 +56,10 @@ SECTIONS .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { *(.data.cacheline_aligned) } + . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); + .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { + *(.data.read_mostly) + } #define VSYSCALL_ADDR (-10*1024*1024) #define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.cacheline_aligned) + SIZEOF(.data.cacheline_aligned) + 4095) & ~(4095)) |