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author | 2021-06-22 10:57:15 -0700 | |
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committer | 2021-06-24 18:00:42 -0400 | |
commit | 4e9c0d80dbbd2dd411d726ed10eccaaba6d63a08 (patch) | |
tree | 90b2849b28001e65de306d4bc03de91198379a1d /arch | |
parent | KVM: x86/mmu: Don't grab CR4.PSE for calculating shadow reserved bits (diff) | |
download | linux-4e9c0d80dbbd2dd411d726ed10eccaaba6d63a08.tar.gz linux-4e9c0d80dbbd2dd411d726ed10eccaaba6d63a08.tar.bz2 linux-4e9c0d80dbbd2dd411d726ed10eccaaba6d63a08.zip |
KVM: x86/mmu: Use MMU's role to get CR4.PSE for computing rsvd bits
Use the MMU's role to get CR4.PSE when calculating reserved bits for the
guest's PTEs. Practically speaking, this is a glorified nop as the role
always come from vCPU state for the relevant flows, but converting to
the roles will provide consistency once everything else is converted, and
will Just Work if the "always comes from vCPU" behavior were ever to
change (unlikely).
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210622175739.3610207-31-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kvm/mmu/mmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index d017352d76c8..3a8af50e1510 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -4216,7 +4216,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, vcpu->arch.reserved_gpa_bits, context->root_level, context->nx, guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES), - is_pse(vcpu), + is_cr4_pse(context), guest_cpuid_is_amd_or_hygon(vcpu)); } |