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author | 2018-08-04 10:23:19 +0200 | |
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committer | 2018-08-13 08:31:31 -0700 | |
commit | 62b0194368147def8c5a77ce604a125d620fc582 (patch) | |
tree | ffb0a3da4944a8aa15ce481a5e695acc03da3684 /arch | |
parent | RISC-V: implement low-level interrupt handling (diff) | |
download | linux-62b0194368147def8c5a77ce604a125d620fc582.tar.gz linux-62b0194368147def8c5a77ce604a125d620fc582.tar.bz2 linux-62b0194368147def8c5a77ce604a125d620fc582.zip |
clocksource: new RISC-V SBI timer driver
The RISC-V ISA defines a per-hart real-time clock and timer, which is
present on all systems. The clock is accessed via the 'rdtime'
pseudo-instruction (which reads a CSR), and the timer is set via an SBI
call.
Contains various improvements from Atish Patra <atish.patra@wdc.com>.
Signed-off-by: Dmitriy Cherkasov <dmitriy@oss-tech.org>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
[hch: remove dead code, add SPDX tags, used riscv_of_processor_hart(),
minor cleanups, merged hotplug cpu support and other improvements
from Atish]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/riscv/include/asm/smp.h | 3 | ||||
-rw-r--r-- | arch/riscv/kernel/irq.c | 3 | ||||
-rw-r--r-- | arch/riscv/kernel/smpboot.c | 1 | ||||
-rw-r--r-- | arch/riscv/kernel/time.c | 9 |
4 files changed, 4 insertions, 12 deletions
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h index c9395fff246f..36016845461d 100644 --- a/arch/riscv/include/asm/smp.h +++ b/arch/riscv/include/asm/smp.h @@ -25,9 +25,6 @@ #ifdef CONFIG_SMP /* SMP initialization hook for setup_arch */ -void __init init_clockevent(void); - -/* SMP initialization hook for setup_arch */ void __init setup_smp(void); /* Hook for the generic smp_call_function_many() routine. */ diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index ab5f3e22c7cc..0cfac48a1272 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -30,6 +30,9 @@ asmlinkage void __irq_entry do_IRQ(struct pt_regs *regs, unsigned long cause) irq_enter(); switch (cause & ~INTERRUPT_CAUSE_FLAG) { + case INTERRUPT_CAUSE_TIMER: + riscv_timer_interrupt(); + break; #ifdef CONFIG_SMP case INTERRUPT_CAUSE_SOFTWARE: /* diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index f741458c5a3f..56abab6a9812 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -104,7 +104,6 @@ asmlinkage void __init smp_callin(void) current->active_mm = mm; trap_init(); - init_clockevent(); notify_cpu_starting(smp_processor_id()); set_cpu_online(smp_processor_id(), 1); local_flush_tlb_all(); diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c index 0df9b2cbd645..1911c8f6b8a6 100644 --- a/arch/riscv/kernel/time.c +++ b/arch/riscv/kernel/time.c @@ -18,12 +18,6 @@ unsigned long riscv_timebase; -void __init init_clockevent(void) -{ - timer_probe(); - csr_set(sie, SIE_STIE); -} - void __init time_init(void) { struct device_node *cpu; @@ -35,6 +29,5 @@ void __init time_init(void) riscv_timebase = prop; lpj_fine = riscv_timebase / HZ; - - init_clockevent(); + timer_probe(); } |