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author | 2015-05-13 17:58:48 +0300 | |
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committer | 2015-07-16 09:34:09 +0200 | |
commit | 9eb15dbbfa1a23b5e65efaf1d5d6c47798e7264b (patch) | |
tree | 0cb5e613376fd40affefb2a340d0330cb905d487 /block | |
parent | cpufreq: tegra: Rename tegra-cpufreq to tegra20-cpufreq (diff) | |
download | linux-9eb15dbbfa1a23b5e65efaf1d5d6c47798e7264b.tar.gz linux-9eb15dbbfa1a23b5e65efaf1d5d6c47798e7264b.tar.bz2 linux-9eb15dbbfa1a23b5e65efaf1d5d6c47798e7264b.zip |
cpufreq: Add cpufreq driver for Tegra124
Add a new cpufreq driver for Tegra124. Instead of using the PLLX as
the CPU clocksource, switch immediately to the DFLL. It allows the use
of higher clock rates, and will automatically scale the CPU voltage as
well. Besides the CPU clocksource switch, we let the cpufreq-dt driver
for all the cpufreq operations.
This driver also relies on the DFLL driver to fill the OPP table for the
CPU0 device, so that the cpufreq-dt driver knows what frequencies to
use.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'block')
0 files changed, 0 insertions, 0 deletions