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| author |  Ira Weiny <ira.weiny@intel.com>
| 2022-12-11 23:06:19 -0800 |
|---|---|---|
| committer |  Dan Williams <dan.j.williams@intel.com>
| 2023-01-05 13:31:27 -0800 |
| commit | 589c3357370a596ef7c99c00baca8ac799fce531 (patch) | |
| tree | 21c318f378c79bbfb616013bd6d08af0bdb8adda /drivers/acpi/pci_root.c | |
| parent | cxl/pci: Move tracepoint definitions to drivers/cxl/core/ (diff) | |
| download | linux-589c3357370a596ef7c99c00baca8ac799fce531.tar.gz linux-589c3357370a596ef7c99c00baca8ac799fce531.tar.bz2 linux-589c3357370a596ef7c99c00baca8ac799fce531.zip | |
PCI/CXL: Export native CXL error reporting control
CXL _OSC Error Reporting Control is used by the OS to determine if
Firmware has control of various CXL error reporting capabilities
including the event logs.
Expose the result of negotiating CXL Error Reporting Control in struct
pci_host_bridge for consumption by the CXL drivers.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lukas Wunner <lukas@wunner.de>
Cc: linux-pci@vger.kernel.org
Cc: linux-acpi@vger.kernel.org
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Link: https://lore.kernel.org/r/20221212070627.1372402-2-ira.weiny@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/acpi/pci_root.c')
| -rw-r--r-- | drivers/acpi/pci_root.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index b3c202d2a433..84030804a763 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -1047,6 +1047,9 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL)) host_bridge->native_dpc = 0; + if (!(root->osc_ext_control_set & OSC_CXL_ERROR_REPORTING_CONTROL)) + host_bridge->native_cxl_error = 0; + /* * Evaluate the "PCI Boot Configuration" _DSM Function. If it * exists and returns 0, we must preserve any PCI resource |