diff options
| author |  Anson Huang <anson.huang@nxp.com>
| 2018-10-17 06:12:04 +0000 |
|---|---|---|
| committer |  Stephen Boyd <sboyd@kernel.org>
| 2018-10-17 08:26:04 -0700 |
| commit | 0d09e668b70ba687ed07976a33a09b19e9416488 (patch) | |
| tree | fb5606f60bb9f744219d3f1225d73ef898e774f0 /drivers/clk/imx/clk-imx7d.c | |
| parent | clk: imx: cpu clock should be always critical (diff) | |
| download | linux-0d09e668b70ba687ed07976a33a09b19e9416488.tar.gz linux-0d09e668b70ba687ed07976a33a09b19e9416488.tar.bz2 linux-0d09e668b70ba687ed07976a33a09b19e9416488.zip | |
clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clk
i.MX7D uses virtual cpu clock of "arm" clock to be child clock
of "arm_a7_root_clk" and it is with CLK_IS_CRITICAL flag set, so
no need to add CLK_IS_CRITICAL flag for keeping "arm_a7_root_clk"
use count correct, latest clock tree is as below in clk_summary:
pll_arm_main 1 1 0 792000000 0
pll_arm_main_bypass 1 1 0 792000000 0
pll_arm_main_clk 1 1 0 792000000 0
arm_a7_src 1 1 0 792000000 0
arm_a7_cg 1 1 0 792000000 0
arm_a7_div 1 1 0 792000000 0
arm_a7_root_clk 1 1 0 792000000 0
arm 1 1 0 792000000
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk-imx7d.c')
| -rw-r--r-- | drivers/clk/imx/clk-imx7d.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index 076460b60e4d..adb08f64c691 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -775,7 +775,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) clks[IMX7D_CLKO1_ROOT_DIV] = imx_clk_divider2("clko1_post_div", "clko1_pre_div", base + 0xbd80, 0, 6); clks[IMX7D_CLKO2_ROOT_DIV] = imx_clk_divider2("clko2_post_div", "clko2_pre_div", base + 0xbe00, 0, 6); - clks[IMX7D_ARM_A7_ROOT_CLK] = imx_clk_gate2_flags("arm_a7_root_clk", "arm_a7_div", base + 0x4000, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); + clks[IMX7D_ARM_A7_ROOT_CLK] = imx_clk_gate2_flags("arm_a7_root_clk", "arm_a7_div", base + 0x4000, 0, CLK_OPS_PARENT_ENABLE); clks[IMX7D_ARM_M4_ROOT_CLK] = imx_clk_gate4("arm_m4_root_clk", "arm_m4_div", base + 0x4010, 0); clks[IMX7D_MAIN_AXI_ROOT_CLK] = imx_clk_gate2_flags("main_axi_root_clk", "axi_post_div", base + 0x4040, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); clks[IMX7D_DISP_AXI_ROOT_CLK] = imx_clk_gate4("disp_axi_root_clk", "disp_axi_post_div", base + 0x4050, 0); |