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| author |  Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| 2021-03-11 16:27:15 +0100 |
|---|---|---|
| committer |  Dinh Nguyen <dinguyen@kernel.org>
| 2021-03-23 11:03:36 -0500 |
| commit | 552418658acd6302e971c7137cb7d3108e464829 (patch) | |
| tree | 0e017a56aa2fcd00c5b9332f8d7db93193fd9f1f /drivers/clk/socfpga/Makefile | |
| parent | clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks (diff) | |
| download | linux-552418658acd6302e971c7137cb7d3108e464829.tar.gz linux-552418658acd6302e971c7137cb7d3108e464829.tar.bz2 linux-552418658acd6302e971c7137cb7d3108e464829.zip | |
clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test)
ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the
32-bit ARM drivers to rely on new symbol.
There is little point to share clock controller drivers between 32-bit
and 64-bit platforms because there will not be a generic image for both
of them. Therefore add a new Kconfig entry for building 32-bit clock
driverss, similar to one for 64-bit. This allows enabling compile
testing.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'drivers/clk/socfpga/Makefile')
| -rw-r--r-- | drivers/clk/socfpga/Makefile | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index ebd3538d12de..e8dfce339c91 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o -obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA32) += clk.o clk-gate.o clk-pll.o clk-periph.o \ + clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \ clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \ clk-agilex.o |