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| author |  Peter De Schrijver <pdeschrijver@nvidia.com>
| 2013-09-02 18:43:56 +0300 |
|---|---|---|
| committer | Peter De Schrijver <pdeschrijver@nvidia.com>
| 2013-11-26 18:46:20 +0200 |
| commit | 5bb9d26700c3db54d5a4346c3b6621b8889f3813 (patch) | |
| tree | e2a25e11c91601efe56ce027b7b11b45fab35177 /drivers/clk/tegra | |
| parent | clk: tegra: common periph_clk_enb_refcnt and clks (diff) | |
| download | linux-5bb9d26700c3db54d5a4346c3b6621b8889f3813.tar.gz linux-5bb9d26700c3db54d5a4346c3b6621b8889f3813.tar.bz2 linux-5bb9d26700c3db54d5a4346c3b6621b8889f3813.zip | |
clk: tegra: Add TEGRA_PERIPH_NO_DIV flag
This flag indicates the peripheral clock does not have a divider. It will
simplify the initialization tables and avoids some very similar code.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra')
| -rw-r--r-- | drivers/clk/tegra/clk-periph.c | 11 | ||||
| -rw-r--r-- | drivers/clk/tegra/clk.h | 1 |
2 files changed, 9 insertions, 3 deletions
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index 5102d5e58c04..b5feccca2f1e 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -173,12 +173,16 @@ const struct clk_ops tegra_clk_periph_nodiv_ops = { static struct clk *_tegra_clk_register_periph(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, - void __iomem *clk_base, u32 offset, bool div, + void __iomem *clk_base, u32 offset, unsigned long flags) { struct clk *clk; struct clk_init_data init; struct tegra_clk_periph_regs *bank; + bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV); + + flags |= periph->gate.flags & TEGRA_PERIPH_NO_DIV ? + CLK_SET_RATE_PARENT : 0; init.name = name; init.ops = div ? &tegra_clk_periph_ops : &tegra_clk_periph_nodiv_ops; @@ -216,7 +220,7 @@ struct clk *tegra_clk_register_periph(const char *name, u32 offset, unsigned long flags) { return _tegra_clk_register_periph(name, parent_names, num_parents, - periph, clk_base, offset, true, flags); + periph, clk_base, offset, flags); } struct clk *tegra_clk_register_periph_nodiv(const char *name, @@ -224,6 +228,7 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset) { + periph->gate.flags |= TEGRA_PERIPH_NO_DIV; return _tegra_clk_register_periph(name, parent_names, num_parents, - periph, clk_base, offset, false, CLK_SET_RATE_PARENT); + periph, clk_base, offset, CLK_SET_RATE_PARENT); } diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 997357ef059e..a82672084718 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -397,6 +397,7 @@ struct tegra_clk_periph_gate { #define TEGRA_PERIPH_MANUAL_RESET BIT(1) #define TEGRA_PERIPH_ON_APB BIT(2) #define TEGRA_PERIPH_WAR_1005168 BIT(3) +#define TEGRA_PERIPH_NO_DIV BIT(4) void tegra_periph_reset(struct tegra_clk_periph_gate *gate, bool assert); extern const struct clk_ops tegra_clk_periph_gate_ops; |