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author | 2019-06-18 17:03:56 +0300 | |
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committer | 2019-06-25 19:49:18 +0200 | |
commit | fc9babc2574691d3bbf0428f007b22261fed55c6 (patch) | |
tree | ca9f1dcd2bffcf20b70e681471a3c1ea1842a29d /drivers/clocksource | |
parent | clocksource/drivers/tegra: Add verbose definition for 1MHz constant (diff) | |
download | linux-fc9babc2574691d3bbf0428f007b22261fed55c6.tar.gz linux-fc9babc2574691d3bbf0428f007b22261fed55c6.tar.bz2 linux-fc9babc2574691d3bbf0428f007b22261fed55c6.zip |
clocksource/drivers/tegra: Restore base address before cleanup
We're adjusting the timer's base for each per-CPU timer to point to the
actual start of the timer since device-tree defines a compound registers
range that includes all of the timers. In this case the original base
need to be restore before calling iounmap to unmap the proper address.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource')
-rw-r--r-- | drivers/clocksource/timer-tegra.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c index cc90f22c559b..8e70f38f1898 100644 --- a/drivers/clocksource/timer-tegra.c +++ b/drivers/clocksource/timer-tegra.c @@ -347,6 +347,8 @@ out_irq: irq_dispose_mapping(cpu_to->clkevt.irq); } } + + to->of_base.base = timer_reg_base; out: timer_of_cleanup(to); |