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| author |  Herbert Xu <herbert@gondor.apana.org.au>
| 2020-08-21 23:59:12 +1000 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au>
| 2020-08-28 16:58:30 +1000 |
| commit | bbb2832620ac4e136416aa97af7310636422dea9 (patch) | |
| tree | 899a970310072d2e2b14b4922b5f155ad852312c /drivers/crypto/stm32/stm32-crc32.c | |
| parent | crypto: ccree - fix runtime PM imbalance on error (diff) | |
| download | linux-bbb2832620ac4e136416aa97af7310636422dea9.tar.gz linux-bbb2832620ac4e136416aa97af7310636422dea9.tar.bz2 linux-bbb2832620ac4e136416aa97af7310636422dea9.zip | |
crypto: stm32 - Fix sparse warnings
This patch fixes most of the sparse endianness warnings in stm32.
The patch itself doesn't change anything apart from markings,
but there is some questionable code in stm32_cryp_check_ctr_counter.
That function operates on the counters as if they're in CPU order,
however, they're then written out as big-endian. This looks like
a genuine bug. Therefore I've left that warning alone until
someone can confirm that this really does work as intended on
little-endian.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/stm32/stm32-crc32.c')
| -rw-r--r-- | drivers/crypto/stm32/stm32-crc32.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/crypto/stm32/stm32-crc32.c b/drivers/crypto/stm32/stm32-crc32.c index 5fb706b68309..783a64f3f635 100644 --- a/drivers/crypto/stm32/stm32-crc32.c +++ b/drivers/crypto/stm32/stm32-crc32.c @@ -218,9 +218,8 @@ static int stm32_crc_update(struct shash_desc *desc, const u8 *d8, return burst_update(desc, d8, length); /* Digest first bytes not 32bit aligned at first pass in the loop */ - size = min(length, - burst_sz + (unsigned int)d8 - ALIGN_DOWN((unsigned int)d8, - sizeof(u32))); + size = min_t(size_t, length, burst_sz + (size_t)d8 - + ALIGN_DOWN((size_t)d8, sizeof(u32))); for (rem_sz = length, cur = d8; rem_sz; rem_sz -= size, cur += size, size = min(rem_sz, burst_sz)) { ret = burst_update(desc, cur, size); |