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| author |  Akhil R <akhilrajeev@nvidia.com>
| 2022-04-26 15:49:12 +0530 |
|---|---|---|
| committer |  Vinod Koul <vkoul@kernel.org>
| 2022-05-19 23:43:41 +0530 |
| commit | 39b930bec80e7af4faae4caf4a36464a6d003bed (patch) | |
| tree | 25891767e49c0e43015f08c13a81943fe827aeb7 /drivers/dma | |
| parent | dmaengine: stm32-dma: add device_pause/device_resume support (diff) | |
| download | linux-39b930bec80e7af4faae4caf4a36464a6d003bed.tar.gz linux-39b930bec80e7af4faae4caf4a36464a6d003bed.tar.bz2 linux-39b930bec80e7af4faae4caf4a36464a6d003bed.zip | |
dmaengine: tegra: Fix uninitialized variable usage
Initialize slave_bw in dma_prep*() functions as the parameter is not
set for DMA_MEM_TO_MEM case in get_transfer_param(). Though the case
may never occur, initializing it avoids warning from certain static
checkers
Fixes: ee17028009d4 ("dmaengine: tegra: Add tegra gpcdma driver")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Link: https://lore.kernel.org/r/20220426101913.43335-2-akhilrajeev@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/tegra186-gpc-dma.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c index 3951db527dec..b33c9b7770d5 100644 --- a/drivers/dma/tegra186-gpc-dma.c +++ b/drivers/dma/tegra186-gpc-dma.c @@ -984,8 +984,8 @@ tegra_dma_prep_slave_sg(struct dma_chan *dc, struct scatterlist *sgl, { struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); unsigned int max_dma_count = tdc->tdma->chip_data->max_dma_count; + enum dma_slave_buswidth slave_bw = DMA_SLAVE_BUSWIDTH_UNDEFINED; u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0; - enum dma_slave_buswidth slave_bw; struct tegra_dma_sg_req *sg_req; struct tegra_dma_desc *dma_desc; struct scatterlist *sg; @@ -1102,12 +1102,12 @@ tegra_dma_prep_dma_cyclic(struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_l size_t period_len, enum dma_transfer_direction direction, unsigned long flags) { + enum dma_slave_buswidth slave_bw = DMA_SLAVE_BUSWIDTH_UNDEFINED; + u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0, burst_size; + unsigned int max_dma_count, len, period_count, i; struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); struct tegra_dma_desc *dma_desc; struct tegra_dma_sg_req *sg_req; - enum dma_slave_buswidth slave_bw; - u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0, burst_size; - unsigned int max_dma_count, len, period_count, i; dma_addr_t mem = buf_addr; int ret; |