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author | 2009-11-11 20:42:46 +0100 | |
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committer | 2009-12-07 19:14:31 +0100 | |
commit | 986a42a25059143d153e30a0cc36630bd0e623c6 (patch) | |
tree | d0bbd9701ff5e88afaedefae2e9986d2694ef940 /drivers/edac/amd64_edac.h | |
parent | amd64_edac: detect DDR3 memory type (diff) | |
download | linux-986a42a25059143d153e30a0cc36630bd0e623c6.tar.gz linux-986a42a25059143d153e30a0cc36630bd0e623c6.tar.bz2 linux-986a42a25059143d153e30a0cc36630bd0e623c6.zip |
amd64_edac: remove early hw support check
The .probe_valid_hardware low_ops member checked whether the DCTs are in
DDR3 mode and bailed out if so. Now that all the needed changes for DDR3
support is in place, remove it.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/amd64_edac.h')
-rw-r--r-- | drivers/edac/amd64_edac.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index f8c187ea6e38..e84f164034dd 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -526,7 +526,6 @@ extern struct mcidev_sysfs_attribute amd64_dbg_attrs[NUM_DBG_ATTRS], * functions and per device encoding/decoding logic. */ struct low_ops { - int (*probe_valid_hardware) (struct amd64_pvt *pvt); int (*early_channel_count) (struct amd64_pvt *pvt); u64 (*get_error_address) (struct mem_ctl_info *mci, |