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| author |  Hawking Zhang <Hawking.Zhang@amd.com>
| 2024-01-29 20:29:08 +0800 |
|---|---|---|
| committer |  Alex Deucher <alexander.deucher@amd.com>
| 2024-01-31 14:04:55 -0500 |
| commit | 1731ba9b64f72c7c5632fca9bf4c124613425971 (patch) | |
| tree | 0b77a36b4f37ecf75b903b2160930c8dfee098fd /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | drm/amd: Don't init MEC2 firmware when it fails to load (diff) | |
| download | linux-1731ba9b64f72c7c5632fca9bf4c124613425971.tar.gz linux-1731ba9b64f72c7c5632fca9bf4c124613425971.tar.bz2 linux-1731ba9b64f72c7c5632fca9bf4c124613425971.zip | |
drm/amdgpu: Update boot time errors polling sequence
Update boot time errors polling sequence to align with
the latest firmware change.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 79bf6bd428a5..084289db23f9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -4120,6 +4120,18 @@ static int amdgpu_ras_wait_for_boot_complete(struct amdgpu_device *adev, u32 reg_data; int retry_loop; + reg_addr = (mmMP0_SMN_C2PMSG_92 << 2) + + aqua_vanjaram_encode_ext_smn_addressing(instance); + + for (retry_loop = 0; retry_loop < AMDGPU_RAS_BOOT_STATUS_POLLING_LIMIT; retry_loop++) { + reg_data = amdgpu_device_indirect_rreg_ext(adev, reg_addr); + if ((reg_data & AMDGPU_RAS_BOOT_STATUS_MASK) == AMDGPU_RAS_BOOT_STEADY_STATUS) { + *boot_error = AMDGPU_RAS_BOOT_SUCEESS; + return 0; + } + msleep(1); + } + /* The pattern for smn addressing in other SOC could be different from * the one for aqua_vanjaram. We should revisit the code if the pattern * is changed. In such case, replace the aqua_vanjaram implementation @@ -4127,7 +4139,7 @@ static int amdgpu_ras_wait_for_boot_complete(struct amdgpu_device *adev, reg_addr = (mmMP0_SMN_C2PMSG_126 << 2) + aqua_vanjaram_encode_ext_smn_addressing(instance); - for (retry_loop = 0; retry_loop < 1000; retry_loop++) { + for (retry_loop = 0; retry_loop < AMDGPU_RAS_BOOT_STATUS_POLLING_LIMIT; retry_loop++) { reg_data = amdgpu_device_indirect_rreg_ext(adev, reg_addr); if (AMDGPU_RAS_GPU_ERR_BOOT_STATUS(reg_data)) { *boot_error = reg_data; |