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author | 2022-01-30 17:03:32 +0800 | |
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committer | 2022-02-14 15:08:40 -0500 | |
commit | bdb3489cfca16815e9a737359e9e90a4af5d0ff3 (patch) | |
tree | 47d9a52a063e953fe2cf39046e86ba248fe129b8 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | |
parent | drm/amdgpu: no rlcg legacy read in SRIOV case (diff) | |
download | linux-bdb3489cfca16815e9a737359e9e90a4af5d0ff3.tar.gz linux-bdb3489cfca16815e9a737359e9e90a4af5d0ff3.tar.bz2 linux-bdb3489cfca16815e9a737359e9e90a4af5d0ff3.zip |
drm/amdgpu: Optimize xxx_ras_late_init/xxx_ras_late_fini for each ras block
1. Define amdgpu_ras_block_late_init to create sysfs nodes
and interrupt handles.
2. Define amdgpu_ras_block_late_fini to remove sysfs nodes
and interrupt handles.
3. Replace ras block variable members in struct
amdgpu_ras_block_object with struct ras_common_if, which
can make it easy to associate each ras block instance
with each ras block functional interface.
4. Add .ras_cb to struct amdgpu_ras_block_object.
5. Change each ras block to fit for the changement of struct
amdgpu_ras_block_object.
Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h index a55743b12d57..8b94b556baf6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h @@ -486,17 +486,13 @@ struct ras_debug_if { }; struct amdgpu_ras_block_object { - /* block name */ - char name[32]; - - enum amdgpu_ras_block block; - - uint32_t sub_block_index; + struct ras_common_if ras_comm; int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj, enum amdgpu_ras_block block, uint32_t sub_block_index); int (*ras_late_init)(struct amdgpu_device *adev, void *ras_info); void (*ras_fini)(struct amdgpu_device *adev); + ras_ih_cb ras_cb; const struct amdgpu_ras_block_hw_ops *hw_ops; }; @@ -605,10 +601,17 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block, struct ras_fs_if *fs_info, struct ras_ih_if *ih_info); + +int amdgpu_ras_block_late_init(struct amdgpu_device *adev, + struct ras_common_if *ras_block); + void amdgpu_ras_late_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block, struct ras_ih_if *ih_info); +void amdgpu_ras_block_late_fini(struct amdgpu_device *adev, + struct ras_common_if *ras_block); + int amdgpu_ras_feature_enable(struct amdgpu_device *adev, struct ras_common_if *head, bool enable); |