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author | 2023-07-26 15:21:48 +0800 | |
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committer | 2023-07-27 15:04:19 -0400 | |
commit | 8cbbd11547f61b90b33a4ef70c4614eb2e789c49 (patch) | |
tree | e128b747f8696cdb3c0722e70bf3b411b0f63c42 /drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | |
parent | drm/radeon: Fix ENOSYS with better fitting error codes in radeon_gem.c (diff) | |
download | linux-8cbbd11547f61b90b33a4ef70c4614eb2e789c49.tar.gz linux-8cbbd11547f61b90b33a4ef70c4614eb2e789c49.tar.bz2 linux-8cbbd11547f61b90b33a4ef70c4614eb2e789c49.zip |
drm/amdgpu: set completion status as preempted for the resubmission
The driver's CSA buffer is shared by all the ibs. When the high priority ib
is submitted after the preempted ib, CP overrides the ib_completion_status
as completed in the csa buffer. After that the preempted ib is resubmitted,
CP would clear some locals stored for ib resume when reading the completed
status, which causes gpu hang in some cases.
Always set status as preempted for those resubmitted ib instead of reading
everything from the CSA buffer.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2535
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2717
Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 0a74116b3142..458faf657042 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -5226,6 +5226,9 @@ static void gfx_v9_0_ring_patch_de_meta(struct amdgpu_ring *ring, de_payload_cpu_addr = adev->virt.csa_cpu_addr + payload_offset; } + ((struct v9_de_ib_state *)de_payload_cpu_addr)->ib_completion_status = + IB_COMPLETION_STATUS_PREEMPTED; + if (offset + (payload_size >> 2) <= ring->buf_mask + 1) { memcpy((void *)&ring->ring[offset], de_payload_cpu_addr, payload_size); } else { |