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author | 2021-10-04 15:19:10 -0400 | |
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committer | 2021-10-04 15:23:01 -0400 | |
commit | 1d789535a03679e5ce0b56a0d32a5e44596dfcdb (patch) | |
tree | ccc2b1827bb7efc4b939f56b49fc4bb7236d100b /drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | |
parent | drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by default (diff) | |
download | linux-1d789535a03679e5ce0b56a0d32a5e44596dfcdb.tar.gz linux-1d789535a03679e5ce0b56a0d32a5e44596dfcdb.tar.bz2 linux-1d789535a03679e5ce0b56a0d32a5e44596dfcdb.zip |
drm/amdgpu: convert IP version array to include instances
Allow us to query instances versions more cleanly.
Instancing support is not consistent unfortunately. SDMA is a
good example. Sienna cichlid has 4 total SDMA instances, each
enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8
total SDMA instances, but they are enumerated as multiple
instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC
is another example. On most chips there are multiple
instances with the same HWID. This allows us to support both
forms.
v2: rebase
v3: clarify instancing support
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c index 4cf5d0595bbe..a11d60ec6321 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c @@ -90,7 +90,7 @@ mmhub_v2_3_print_l2_protection_fault_status(struct amdgpu_device *adev, dev_err(adev->dev, "MMVM_L2_PROTECTION_FAULT_STATUS:0x%08X\n", status); - switch (adev->ip_versions[MMHUB_HWIP]) { + switch (adev->ip_versions[MMHUB_HWIP][0]) { case IP_VERSION(2, 3, 0): case IP_VERSION(2, 4, 0): mmhub_cid = mmhub_client_ids_vangogh[cid][rw]; |