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| author |  Tao Zhou <tao.zhou1@amd.com>
| 2023-07-26 15:42:26 +0800 |
|---|---|---|
| committer |  Alex Deucher <alexander.deucher@amd.com>
| 2023-09-11 17:10:58 -0400 |
| commit | 3cb9ebc9d652a874ab315eeac59bbe5950987db9 (patch) | |
| tree | b6339f7e8585b87d83a85f34bb1d5f73e70fbbbe /drivers/gpu/drm/amd/amdgpu/umc_v12_0.h | |
| parent | drm/amd/pm: enable smu_v13_0_6 mca debug mode when UMC RAS feature is enabled (diff) | |
| download | linux-3cb9ebc9d652a874ab315eeac59bbe5950987db9.tar.gz linux-3cb9ebc9d652a874ab315eeac59bbe5950987db9.tar.bz2 linux-3cb9ebc9d652a874ab315eeac59bbe5950987db9.zip | |
drm/amdgpu: add channel index table for UMC v12
Get UMC phyical channel index according to node id, umc instance and
channel instance.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/umc_v12_0.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/umc_v12_0.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h index be65f274b7a5..e3619d67ae3b 100644 --- a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h +++ b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h @@ -115,6 +115,11 @@ (pa) |= (UMC_V12_0_CHANNEL_HASH_CH6(channel_idx, pa) << UMC_V12_0_PA_CH6_BIT); \ } while (0) +extern const uint32_t + umc_v12_0_channel_idx_tbl[] + [UMC_V12_0_UMC_INSTANCE_NUM] + [UMC_V12_0_CHANNEL_INSTANCE_NUM]; + extern struct amdgpu_umc_ras umc_v12_0_ras; #endif |