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author | 2023-10-24 14:00:39 +0800 | |
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committer | 2023-11-09 17:01:20 -0500 | |
commit | bf13da6ae1a0097cf2ff4fba1e3236aaa3fa3a7a (patch) | |
tree | de753196b14bec2dad8e7d3a5a4e3b44cb0d61a7 /drivers/gpu/drm/amd/amdgpu/umc_v12_0.h | |
parent | drm/amdgpu: Add xcc param to SRIOV kiq write and WREG32_SOC15_IP_NO_KIQ (v4) (diff) | |
download | linux-bf13da6ae1a0097cf2ff4fba1e3236aaa3fa3a7a.tar.gz linux-bf13da6ae1a0097cf2ff4fba1e3236aaa3fa3a7a.tar.bz2 linux-bf13da6ae1a0097cf2ff4fba1e3236aaa3fa3a7a.zip |
drm/amdgpu: correct smu v13.0.6 umc ras error check
correct smu v13.0.0 umc ras error check
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/umc_v12_0.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/umc_v12_0.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h index 4885b9fff272..b34b1e358f8b 100644 --- a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h +++ b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h @@ -117,6 +117,9 @@ (pa) |= (UMC_V12_0_CHANNEL_HASH_CH6(channel_idx, pa) << UMC_V12_0_PA_CH6_BIT); \ } while (0) +bool umc_v12_0_is_uncorrectable_error(uint64_t mc_umc_status); +bool umc_v12_0_is_correctable_error(uint64_t mc_umc_status); + extern const uint32_t umc_v12_0_channel_idx_tbl[] [UMC_V12_0_UMC_INSTANCE_NUM] |