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| author |  Charlene Liu <charlene.liu@amd.com>
| 2023-08-29 21:08:38 -0400 |
|---|---|---|
| committer |  Alex Deucher <alexander.deucher@amd.com>
| 2023-10-09 16:51:06 -0400 |
| commit | 0e56de91edd0b81e2c8df98413e68bed4ef13706 (patch) | |
| tree | ca6040ebd4325ca638254d2efed5e8169f5ce957 /drivers/gpu/drm/amd/display/dc/dcn35 | |
| parent | drm/amd/display: Fix Chroma Surface height/width initialization (diff) | |
| download | linux-0e56de91edd0b81e2c8df98413e68bed4ef13706.tar.gz linux-0e56de91edd0b81e2c8df98413e68bed4ef13706.tar.bz2 linux-0e56de91edd0b81e2c8df98413e68bed4ef13706.zip | |
drm/amd/display: correct dml2 input and dlg_refclk
dc->dml2_options.use_native_pstate_optimization flag will make driver
use dcn32 legacy_svp_drr related tuning. Set this to false fixed the
stutter underflow issue also based on HW suggest disable ODM by default
and let DML choose it.
Reviewed-by: Zhan Liu <zhan.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn35')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c index e2f3ddb3f225..2283daa45318 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c @@ -733,8 +733,7 @@ static const struct dc_debug_options debug_defaults_drv = { .support_eDP1_5 = true, .enable_hpo_pg_support = false, .enable_legacy_fast_update = true, - .disable_stutter = true, - .enable_single_display_2to1_odm_policy = true, + .enable_single_display_2to1_odm_policy = false, .disable_idle_power_optimizations = true, .dmcub_emulation = false, .disable_boot_optimizations = false, @@ -1835,6 +1834,7 @@ static bool dcn35_resource_construct( /* Use pipe context based otg sync logic */ dc->config.use_pipe_ctx_sync_logic = true; + dc->config.use_default_clock_table = true; /* read VBIOS LTTPR caps */ { if (ctx->dc_bios->funcs->get_lttpr_caps) { @@ -2065,11 +2065,10 @@ static bool dcn35_resource_construct( dc->cap_funcs = cap_funcs; - dc->dcn_ip->max_num_dpp = pool->base.pipe_count; dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; - dc->dml2_options.use_native_pstate_optimization = false; + dc->dml2_options.use_native_pstate_optimization = true; dc->dml2_options.use_native_soc_bb_construction = true; if (dc->config.EnableMinDispClkODM) dc->dml2_options.minimize_dispclk_using_odm = true; |