diff options
| author |  Qingqing Zhuo <Qingqing.Zhuo@amd.com>
| 2023-08-03 00:43:25 -0400 |
|---|---|---|
| committer |  Alex Deucher <alexander.deucher@amd.com>
| 2023-10-09 16:49:39 -0400 |
| commit | 115009d11ccf513f2fe01fd7c33a54157e3c31f4 (patch) | |
| tree | 5ee8679513f5b8fc3bba4b11576a54732c855008 /drivers/gpu/drm/amd/display/dc/dcn35 | |
| parent | drm/amd/display: Introduce DML2 (diff) | |
| download | linux-115009d11ccf513f2fe01fd7c33a54157e3c31f4.tar.gz linux-115009d11ccf513f2fe01fd7c33a54157e3c31f4.tar.bz2 linux-115009d11ccf513f2fe01fd7c33a54157e3c31f4.zip | |
drm/amd/display: Add DCN35 DML2 support
Enable DML2 for DCN35.
Changes since V1:
- Remove hard coded values
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn35')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c index 693c7ba4b34d..2fa876d9e1f7 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c @@ -31,7 +31,7 @@ #include "resource.h" #include "include/irq_service_interface.h" #include "dcn35_resource.h" -/*#include "dml2/dml2_wrapper.h"*/ +#include "dml2/dml2_wrapper.h" #include "dcn20/dcn20_resource.h" #include "dcn30/dcn30_resource.h" @@ -729,7 +729,7 @@ static const struct dc_debug_options debug_defaults_drv = { }, .seamless_boot_odm_combine = DML_FAIL_SOURCE_PIXEL_FORMAT, .enable_z9_disable_interface = true, /* Allow support for the PMFW interface for disable Z9*/ - /* .using_dml2 = true, */ + .using_dml2 = true, .support_eDP1_5 = true, .enable_hpo_pg_support = false, .enable_legacy_fast_update = true, @@ -1694,7 +1694,7 @@ static bool dcn35_validate_bandwidth(struct dc *dc, { bool out = false; - /*out = dml2_validate(dc, context, fast_validate);*/ + out = dml2_validate(dc, context, fast_validate); return out; } @@ -2067,18 +2067,19 @@ static bool dcn35_resource_construct( dc->dcn_ip->max_num_dpp = pool->base.pipe_count; -#if 0 + dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; dc->dml2_options.use_native_pstate_optimization = false; dc->dml2_options.use_native_soc_bb_construction = true; + if (dc->config.EnableMinDispClkODM) + dc->dml2_options.minimize_dispclk_using_odm = true; dc->dml2_options.callbacks.dc = dc; dc->dml2_options.callbacks.build_scaling_params = &resource_build_scaling_params; dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch; - dc->dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm; + dc->dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy; dc->dml2_options.max_segments_per_hubp = 18; dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/ -#endif if (dc->config.sdpif_request_limit_words_per_umc == 0) dc->config.sdpif_request_limit_words_per_umc = 16;/*todo*/ |