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authorGravatar Bhuvana Chandra Pinninti <bhuvanachandra.pinninti@amd.com> 2023-10-18 19:16:17 +0530
committerGravatar Alex Deucher <alexander.deucher@amd.com> 2023-11-29 16:48:59 -0500
commit6c22fb07e0c2935d97a86509f16f755ab895f2c8 (patch)
treeb3108c54961ef4188e8dfe35222b31b4eafc1ccf /drivers/gpu/drm/amd/display/dc/dcn35
parentdrm/amd/display: Use DRAM speed from validation for dummy p-state (diff)
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drm/amd/display: Refactor DSC into component folder
[why] To refactor DSC and make DSC files unit testable. [how] moved the dcnxx_dsc.c and .h files into corresponding dcn folders inside the dsc and cleared the linkage errors. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Bhuvana Chandra Pinninti <bhuvanachandra.pinninti@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn35')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn35/Makefile2
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dsc.c60
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dsc.h59
3 files changed, 1 insertions, 120 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/Makefile b/drivers/gpu/drm/amd/display/dc/dcn35/Makefile
index 719afb5a3b12..85a307babab9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn35/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dcn35/Makefile
@@ -12,7 +12,7 @@
DCN35 = dcn35_init.o dcn35_dio_stream_encoder.o \
dcn35_dio_link_encoder.o dcn35_dccg.o dcn35_optc.o \
- dcn35_dsc.o dcn35_hubp.o dcn35_hubbub.o \
+ dcn35_hubp.o dcn35_hubbub.o \
dcn35_mmhubbub.o dcn35_opp.o dcn35_dpp.o dcn35_pg_cntl.o dcn35_dwb.o
AMD_DAL_DCN35 = $(addprefix $(AMDDALPATH)/dc/dcn35/,$(DCN35))
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dsc.c
deleted file mode 100644
index 71d2dff9986d..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dsc.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright 2023 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#include "dcn35_dsc.h"
-#include "reg_helper.h"
-
-/* Macro definitios for REG_SET macros*/
-#define CTX \
- dsc20->base.ctx
-
-#define REG(reg)\
- dsc20->dsc_regs->reg
-
-#undef FN
-#define FN(reg_name, field_name) \
- ((const struct dcn35_dsc_shift *)(dsc20->dsc_shift))->field_name, \
- ((const struct dcn35_dsc_mask *)(dsc20->dsc_mask))->field_name
-
-#define DC_LOGGER \
- dsc->ctx->logger
-
-void dsc35_construct(struct dcn20_dsc *dsc,
- struct dc_context *ctx,
- int inst,
- const struct dcn20_dsc_registers *dsc_regs,
- const struct dcn35_dsc_shift *dsc_shift,
- const struct dcn35_dsc_mask *dsc_mask)
-{
- dsc2_construct(dsc, ctx, inst, dsc_regs,
- (const struct dcn20_dsc_shift *)(dsc_shift),
- (const struct dcn20_dsc_mask *)(dsc_mask));
-}
-
-void dsc35_set_fgcg(struct dcn20_dsc *dsc20, bool enable)
-{
- REG_UPDATE(DSC_TOP_CONTROL, DSC_FGCG_REP_DIS, !enable);
-}
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dsc.h b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dsc.h
deleted file mode 100644
index 133ad38842cc..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dsc.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright 2023 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DCN35_DSC_H__
-#define __DCN35_DSC_H__
-
-#include "dcn20/dcn20_dsc.h"
-
-#define DSC_REG_LIST_SH_MASK_DCN35(mask_sh) \
- DSC_REG_LIST_SH_MASK_DCN20(mask_sh), \
- DSC_SF(DSC_TOP0_DSC_TOP_CONTROL, DSC_FGCG_REP_DIS, mask_sh)
-
-#define DSC_FIELD_LIST_DCN35(type) \
- struct { \
- DSC_FIELD_LIST_DCN20(type); \
- type DSC_FGCG_REP_DIS; \
- }
-
-struct dcn35_dsc_shift {
- DSC_FIELD_LIST_DCN35(uint8_t);
-};
-
-struct dcn35_dsc_mask {
- DSC_FIELD_LIST_DCN35(uint32_t);
-};
-
-void dsc35_construct(struct dcn20_dsc *dsc,
- struct dc_context *ctx,
- int inst,
- const struct dcn20_dsc_registers *dsc_regs,
- const struct dcn35_dsc_shift *dsc_shift,
- const struct dcn35_dsc_mask *dsc_mask);
-
-void dsc35_set_fgcg(struct dcn20_dsc *dsc20, bool enable);
-
-#endif /* __DCN35_DSC_H__ */