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author | 2023-09-26 15:46:21 -0400 | |
---|---|---|
committer | 2023-10-09 16:58:30 -0400 | |
commit | c7c19779251861290ae18ea242ae1f0049df529f (patch) | |
tree | 44acf33c0128fa327d1096009ab587a188fe8c86 /drivers/gpu/drm/amd/display/dc/dcn35 | |
parent | drm/amd/display: Update stream mask (diff) | |
download | linux-c7c19779251861290ae18ea242ae1f0049df529f.tar.gz linux-c7c19779251861290ae18ea242ae1f0049df529f.tar.bz2 linux-c7c19779251861290ae18ea242ae1f0049df529f.zip |
drm/amd/display: Update dml ssb from pmfw clock table
[why]
Need to use real clock table
[How]
Update the clock table
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Muhammad Ahmed <ahmed.ahmed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn35')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c index f1d776f39543..afc14259a7b5 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c @@ -698,7 +698,7 @@ static const struct dc_debug_options debug_defaults_drv = { .underflow_assert_delay_us = 0xFFFFFFFF, .dwb_fi_phase = -1, // -1 = disable, .dmub_command_table = true, - .pstate_enabled = false, + .pstate_enabled = true, .use_max_lb = true, .enable_mem_low_power = { .bits = { @@ -1840,7 +1840,7 @@ static bool dcn35_resource_construct( /* Use pipe context based otg sync logic */ dc->config.use_pipe_ctx_sync_logic = true; - dc->config.use_default_clock_table = true; + dc->config.use_default_clock_table = false; /* read VBIOS LTTPR caps */ { if (ctx->dc_bios->funcs->get_lttpr_caps) { |