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| author |  Jesse Barnes <jbarnes@virtuousgeek.org>
| 2015-09-10 08:20:28 -0700 |
|---|---|---|
| committer |  Daniel Vetter <daniel.vetter@ffwll.ch>
| 2015-09-14 11:12:29 +0200 |
| commit | 6ff8ab0d0fab914755cb79b1e0469dd7123cc471 (patch) | |
| tree | 9a26e68a73e870401ad53886c3c3ce536ac3386b /drivers/gpu/drm/i915/intel_csr.c | |
| parent | drm/i915/gen9: Add WaDisableMinuteIaClockGating (diff) | |
| download | linux-6ff8ab0d0fab914755cb79b1e0469dd7123cc471.tar.gz linux-6ff8ab0d0fab914755cb79b1e0469dd7123cc471.tar.bz2 linux-6ff8ab0d0fab914755cb79b1e0469dd7123cc471.zip | |
drm/i915: make CSR firmware messages less verbose
Use WARN_ONCE in a bunch of places and demote a message that would
continually spam us.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_csr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_csr.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index ba1ae031e6fd..765dfcd15727 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -454,10 +454,10 @@ void intel_csr_ucode_fini(struct drm_device *dev) void assert_csr_loaded(struct drm_i915_private *dev_priv) { - WARN(intel_csr_load_status_get(dev_priv) != FW_LOADED, - "CSR is not loaded.\n"); - WARN(!I915_READ(CSR_PROGRAM_BASE), - "CSR program storage start is NULL\n"); - WARN(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n"); - WARN(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n"); + WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED, + "CSR is not loaded.\n"); + WARN_ONCE(!I915_READ(CSR_PROGRAM_BASE), + "CSR program storage start is NULL\n"); + WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n"); + WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n"); } |