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| author |  Ville Syrjälä <ville.syrjala@linux.intel.com>
| 2014-05-15 20:23:23 +0300 |
|---|---|---|
| committer |  Daniel Vetter <daniel.vetter@ffwll.ch>
| 2014-05-22 15:06:38 +0200 |
| commit | 80715b2f7b97154ad8d791ddf85a386081fcceab (patch) | |
| tree | e1608bab20af0e6eaf2aae99d88675af31a047f8 /drivers/gpu/drm/i915/intel_drv.h | |
| parent | drm/i915: Draw a picture about video timings (diff) | |
| download | linux-80715b2f7b97154ad8d791ddf85a386081fcceab.tar.gz linux-80715b2f7b97154ad8d791ddf85a386081fcceab.tar.bz2 linux-80715b2f7b97154ad8d791ddf85a386081fcceab.zip | |
drm/i915: Fix gen2 and hsw+ scanline counter
On gen2 the scanline counter behaves a bit differently from the
later generations. Instead of adding one to the raw scanline
counter value, we must subtract one.
On HSW/BDW the scanline counter requires a +2 adjustment on HDMI
outputs. DP outputs on the on the other require the typical +1
adjustment.
As the fixup we must apply to the hardware scanline counter
depends on several factors, compute the desired offset at modeset
time and tuck it away for when it's needed.
v2: Clarify HSW+ situation
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: "Akash Goel <akash.goels@gmail.com>"
Reviewed-by: "Sourab Gupta <sourabgupta@gmail.com>"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78997
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 287b89e97456..d7c52b2c546a 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -409,6 +409,8 @@ struct intel_crtc { } wm; wait_queue_head_t vbl_wait; + + int scanline_offset; }; struct intel_plane_wm_parameters { |