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authorGravatar Ville Syrjälä <ville.syrjala@linux.intel.com> 2016-10-31 22:37:16 +0200
committerGravatar Ville Syrjälä <ville.syrjala@linux.intel.com> 2016-11-01 16:40:38 +0200
commit148ac1f375fe9625f08a531d198e2d8559cbdd79 (patch)
tree85f9efa8b9d14bc2423f3cee13be0e4390406394 /drivers/gpu/drm/i915/intel_pm.c
parentdrm/i915: Pass dev_priv to IS_PINEVIEW() (diff)
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drm/i915: Pass dev_priv to i915_pineview_get_mem_freq() and i915_ironlake_get_mem_freq()
Unify our approach to things by passing around dev_priv instead of dev. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1477946245-14134-18-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 11bbc35a4c84..d423fc8661a9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -108,9 +108,8 @@ static void bxt_init_clock_gating(struct drm_device *dev)
PWM1_GATING_DIS | PWM2_GATING_DIS);
}
-static void i915_pineview_get_mem_freq(struct drm_device *dev)
+static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
u32 tmp;
tmp = I915_READ(CLKCFG);
@@ -147,9 +146,8 @@ static void i915_pineview_get_mem_freq(struct drm_device *dev)
dev_priv->is_ddr3 = (tmp & CSHRDDR3CTL_DDR3) ? 1 : 0;
}
-static void i915_ironlake_get_mem_freq(struct drm_device *dev)
+static void i915_ironlake_get_mem_freq(struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
u16 ddrpll, csipll;
ddrpll = I915_READ16(DDRMPLL1);
@@ -7744,9 +7742,9 @@ void intel_init_pm(struct drm_device *dev)
/* For cxsr */
if (IS_PINEVIEW(dev_priv))
- i915_pineview_get_mem_freq(dev);
+ i915_pineview_get_mem_freq(dev_priv);
else if (IS_GEN5(dev_priv))
- i915_ironlake_get_mem_freq(dev);
+ i915_ironlake_get_mem_freq(dev_priv);
/* For FIFO watermark updates */
if (INTEL_INFO(dev)->gen >= 9) {