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author | 2023-11-07 15:00:03 +0800 | |
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committer | 2023-11-29 16:48:59 -0500 | |
commit | c77b0008591094d454c1f340d1e82b5ebe2d918d (patch) | |
tree | d5dc9a781c711f7eb957f7997f006220a5d2cc75 /drivers/gpu/drm | |
parent | drm/amd/display: Refactor DSC into component folder (diff) | |
download | linux-c77b0008591094d454c1f340d1e82b5ebe2d918d.tar.gz linux-c77b0008591094d454c1f340d1e82b5ebe2d918d.tar.bz2 linux-c77b0008591094d454c1f340d1e82b5ebe2d918d.zip |
drm/amd/display: replay: generalize the send command function usage
Augment the function to allow send different format data in different
use case.
Reviewed-by: Dennis Chan <dennis.chan@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Max Tseng <max.tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
6 files changed, 16 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index edf60c4f318c..6f5da510e8de 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -1029,6 +1029,7 @@ enum replay_coasting_vtotal_type { * passed to DMUB. */ enum replay_FW_Message_type { + Replay_Msg_Not_Support = -1, Replay_Set_Timing_Sync_Supported, }; diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h b/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h index 427bc47a676e..368711f76335 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h @@ -46,8 +46,7 @@ struct dmub_replay_funcs { void (*replay_set_power_opt)(struct dmub_replay *dmub, unsigned int power_opt, uint8_t panel_inst); void (*replay_send_cmd)(struct dmub_replay *dmub, - enum replay_FW_Message_type msg, unsigned int panel_inst, - uint32_t cmd_data); + enum replay_FW_Message_type msg, unsigned int panel_inst, union dmub_replay_cmd_set *cmd_element); void (*replay_set_coasting_vtotal)(struct dmub_replay *dmub, uint16_t coasting_vtotal, uint8_t panel_inst); void (*replay_residency)(struct dmub_replay *dmub, diff --git a/drivers/gpu/drm/amd/display/dc/inc/link.h b/drivers/gpu/drm/amd/display/dc/inc/link.h index dd3f53151d8b..7439865d1b50 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/link.h +++ b/drivers/gpu/drm/amd/display/dc/inc/link.h @@ -283,7 +283,7 @@ struct link_service { const struct dc_stream_state *stream); bool (*edp_send_replay_cmd)(struct dc_link *link, enum replay_FW_Message_type msg, - uint32_t params); + union dmub_replay_cmd_set *cmd_data); bool (*edp_set_coasting_vtotal)( struct dc_link *link, uint16_t coasting_vtotal); bool (*edp_replay_residency)(const struct dc_link *link, diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c index c52b51b2b4b3..6bc8ec47e267 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c @@ -1014,7 +1014,7 @@ bool edp_setup_replay(struct dc_link *link, const struct dc_stream_state *stream */ bool edp_send_replay_cmd(struct dc_link *link, enum replay_FW_Message_type msg, - uint32_t cmd_data) + union dmub_replay_cmd_set *cmd_data) { struct dc *dc = link->ctx->dc; struct dmub_replay *replay = dc->res_pool->replay; @@ -1026,7 +1026,7 @@ bool edp_send_replay_cmd(struct dc_link *link, if (!dc_get_edp_link_panel_inst(dc, link, &panel_inst)) return false; - replay->funcs->replay_send_cmd(replay, msg, cmd_data, panel_inst); + replay->funcs->replay_send_cmd(replay, msg, panel_inst, cmd_data); return true; } diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h index 6b223580ac8a..39526bd40178 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h @@ -59,7 +59,7 @@ bool edp_setup_replay(struct dc_link *link, const struct dc_stream_state *stream); bool edp_send_replay_cmd(struct dc_link *link, enum replay_FW_Message_type msg, - uint32_t params); + union dmub_replay_cmd_set *cmd_data); bool edp_set_coasting_vtotal(struct dc_link *link, uint16_t coasting_vtotal); bool edp_replay_residency(const struct dc_link *link, unsigned int *residency, const bool is_start, const bool is_alpm); diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 55573083bc31..5f06cf4c663f 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -3144,6 +3144,16 @@ struct dmub_rb_cmd_replay_set_timing_sync { }; /** + * Definition union of replay command set + */ +union dmub_replay_cmd_set { + /** + * Definition of DMUB_CMD__REPLAY_SET_TIMING_SYNC_SUPPORTED command data. + */ + struct dmub_cmd_replay_set_timing_sync_data sync_data; +}; + +/** * Set of HW components that can be locked. * * Note: If updating with more HW components, fields |