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authorGravatar Wangyan Wang <wangyan.wang@mediatek.com> 2019-04-09 14:53:05 +0800
committerGravatar CK Hu <ck.hu@mediatek.com> 2019-04-09 17:47:01 +0800
commit8eeb3946feeb00486ac0909e2309da87db8988a5 (patch)
treeeea69ab79907588bec40e4ce9694ca65805723ab /drivers/gpu
parentdrm/mediatek: remove flag CLK_SET_RATE_PARENT for MT2701 hdmi phy (diff)
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drm/mediatek: using new factor for tvdpll for MT2701 hdmi phy
This is the second step to make MT2701 HDMI stable. The factor depends on the divider of DPI in MT2701, therefore, we should fix this factor to the right and new one. Test: search ok Signed-off-by: Wangyan Wang <wangyan.wang@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_dpi.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 22e68a100e7b..5d333138f913 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -662,13 +662,11 @@ static unsigned int mt8173_calculate_factor(int clock)
static unsigned int mt2701_calculate_factor(int clock)
{
if (clock <= 64000)
- return 16;
- else if (clock <= 128000)
- return 8;
- else if (clock <= 256000)
return 4;
- else
+ else if (clock <= 128000)
return 2;
+ else
+ return 1;
}
static const struct mtk_dpi_conf mt8173_conf = {