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| author |  Samuel Holland <samuel.holland@sifive.com>
| 2024-03-12 14:28:08 -0700 |
|---|---|---|
| committer |  Thomas Gleixner <tglx@linutronix.de>
| 2024-03-15 15:27:02 +0100 |
| commit | ca5b0b717b75d0f86f7f5dfe18369781bec742ad (patch) | |
| tree | d1f8f912e858b9dd50353b8e9227553a3ee3ddf1 /drivers/irqchip/irq-ath79-cpu.c | |
| parent | Merge tag 'irq-msi-2024-03-10' of git://git.kernel.org/pub/scm/linux/kernel/g... (diff) | |
| download | linux-ca5b0b717b75d0f86f7f5dfe18369781bec742ad.tar.gz linux-ca5b0b717b75d0f86f7f5dfe18369781bec742ad.tar.bz2 linux-ca5b0b717b75d0f86f7f5dfe18369781bec742ad.zip | |
irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32
riscv_intc_custom_base is initialized to BITS_PER_LONG, so the second
check passes even though AIA provides 64 interrupts. Adjust the condition to
only check the custom range for interrupts outside the standard range, and
adjust the standard range when AIA is available.
Fixes: 3c46fc5b5507 ("irqchip/riscv-intc: Add support for RISC-V AIA")
Fixes: 678c607ecf8a ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240312212813.2323841-1-samuel.holland@sifive.com
Diffstat (limited to 'drivers/irqchip/irq-ath79-cpu.c')
0 files changed, 0 insertions, 0 deletions