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author | 2019-12-20 05:08:47 +0300 | |
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committer | 2020-01-10 15:47:18 +0100 | |
commit | 51bb73f93410a30550641f69d14cfb7b43fd2da1 (patch) | |
tree | ed9a36ac3324df76ef4195a2f8d8c1317fbc6ff1 /drivers/memory | |
parent | memory: tegra: Correct reset value of xusb_hostr (diff) | |
download | linux-51bb73f93410a30550641f69d14cfb7b43fd2da1.tar.gz linux-51bb73f93410a30550641f69d14cfb7b43fd2da1.tar.bz2 linux-51bb73f93410a30550641f69d14cfb7b43fd2da1.zip |
memory: tegra30-emc: Firm up suspend/resume sequence
The current code doesn't prevent race conditions of suspend/resume vs CCF.
Let's take exclusive control over the EMC clock during suspend in a way
that is free from race conditions.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory')
-rw-r--r-- | drivers/memory/tegra/tegra30-emc.c | 38 |
1 files changed, 20 insertions, 18 deletions
diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index d61cb74cb52b..b86ae0c38ced 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -346,7 +346,6 @@ struct tegra_emc { bool vref_cal_toggle : 1; bool zcal_long : 1; bool dll_on : 1; - bool prepared : 1; bool bad_state : 1; struct { @@ -758,9 +757,6 @@ static int emc_prepare_timing_change(struct tegra_emc *emc, unsigned long rate) /* interrupt can be re-enabled now */ enable_irq(emc->irq); - emc->bad_state = false; - emc->prepared = true; - return 0; } @@ -769,13 +765,12 @@ static int emc_complete_timing_change(struct tegra_emc *emc, { struct emc_timing *timing = emc_find_timing(emc, rate); unsigned long timeout; - int ret; + int err; timeout = wait_for_completion_timeout(&emc->clk_handshake_complete, msecs_to_jiffies(100)); if (timeout == 0) { dev_err(emc->dev, "emc-car handshake failed\n"); - emc->bad_state = true; return -EIO; } @@ -797,22 +792,23 @@ static int emc_complete_timing_change(struct tegra_emc *emc, udelay(2); /* update restored timing */ - ret = emc_seq_update_timing(emc); - if (ret) - emc->bad_state = true; + err = emc_seq_update_timing(emc); /* restore early ACK */ mc_writel(emc->mc, emc->mc_override, MC_EMEM_ARB_OVERRIDE); - emc->prepared = false; + if (err) + return err; + + emc->bad_state = false; - return ret; + return 0; } static int emc_unprepare_timing_change(struct tegra_emc *emc, unsigned long rate) { - if (emc->prepared && !emc->bad_state) { + if (!emc->bad_state) { /* shouldn't ever happen in practice */ dev_err(emc->dev, "timing configuration can't be reverted\n"); emc->bad_state = true; @@ -1354,13 +1350,17 @@ unset_cb: static int tegra_emc_suspend(struct device *dev) { struct tegra_emc *emc = dev_get_drvdata(dev); + int err; + + /* take exclusive control over the clock's rate */ + err = clk_rate_exclusive_get(emc->clk); + if (err) { + dev_err(emc->dev, "failed to acquire clk: %d\n", err); + return err; + } - /* - * Suspending in a bad state will hang machine. The "prepared" var - * shall be always false here unless it's a kernel bug that caused - * suspending in a wrong order. - */ - if (WARN_ON(emc->prepared) || emc->bad_state) + /* suspending in a bad state will hang machine */ + if (WARN(emc->bad_state, "hardware in a bad state\n")) return -EINVAL; emc->bad_state = true; @@ -1375,6 +1375,8 @@ static int tegra_emc_resume(struct device *dev) emc_setup_hw(emc); emc->bad_state = false; + clk_rate_exclusive_put(emc->clk); + return 0; } |