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author | 2020-12-03 22:24:31 +0300 | |
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committer | 2020-12-05 14:53:59 +0100 | |
commit | 7e04ce2a9d3071f791a8147b5d3c8ddbb8e38989 (patch) | |
tree | 5b8f35d873feb6637d4aacd9fc53728865b079a4 /drivers/memory | |
parent | dt-bindings: memory: tegra20-emc: Document opp-supported-hw property (diff) | |
download | linux-7e04ce2a9d3071f791a8147b5d3c8ddbb8e38989.tar.gz linux-7e04ce2a9d3071f791a8147b5d3c8ddbb8e38989.tar.bz2 linux-7e04ce2a9d3071f791a8147b5d3c8ddbb8e38989.zip |
memory: tegra20: Support hardware versioning and clean up OPP table initialization
Support hardware versioning, which is now required for Tegra20 EMC OPP.
Clean up OPP table initialization by using a error code returned by OPP
API for judging about the OPP table presence in a device-tree and remove
OPP regulator initialization because we're now going to use power domain
instead of a raw regulator. This puts Tegra20 EMC OPP preparation on par
with the Tegra30/124 EMC drivers.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20201203192439.16177-3-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'drivers/memory')
-rw-r--r-- | drivers/memory/tegra/tegra20-emc.c | 48 |
1 files changed, 20 insertions, 28 deletions
diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index 0320d9df4a20..686aaf477d8a 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -910,43 +910,36 @@ err_msg: static int tegra_emc_opp_table_init(struct tegra_emc *emc) { - struct opp_table *reg_opp_table = NULL, *clk_opp_table; - const char *rname = "core"; + u32 hw_version = BIT(tegra_sku_info.soc_process_id); + struct opp_table *clk_opp_table, *hw_opp_table; int err; - /* - * Legacy device-trees don't have OPP table and EMC driver isn't - * useful in this case. - */ - if (!device_property_present(emc->dev, "operating-points-v2")) { - dev_err(emc->dev, - "OPP table not found, please update your device tree\n"); - return -ENODEV; - } - - /* voltage scaling is optional */ - if (device_property_present(emc->dev, "core-supply")) { - reg_opp_table = dev_pm_opp_set_regulators(emc->dev, &rname, 1); - if (IS_ERR(reg_opp_table)) - return dev_err_probe(emc->dev, PTR_ERR(reg_opp_table), - "failed to set OPP regulator\n"); - } - clk_opp_table = dev_pm_opp_set_clkname(emc->dev, NULL); err = PTR_ERR_OR_ZERO(clk_opp_table); if (err) { dev_err(emc->dev, "failed to set OPP clk: %d\n", err); - goto put_reg_table; + return err; } - err = dev_pm_opp_of_add_table(emc->dev); + hw_opp_table = dev_pm_opp_set_supported_hw(emc->dev, &hw_version, 1); + err = PTR_ERR_OR_ZERO(hw_opp_table); if (err) { - dev_err(emc->dev, "failed to add OPP table: %d\n", err); + dev_err(emc->dev, "failed to set OPP supported HW: %d\n", err); goto put_clk_table; } - dev_info(emc->dev, "current clock rate %lu MHz\n", - clk_get_rate(emc->clk) / 1000000); + err = dev_pm_opp_of_add_table(emc->dev); + if (err) { + if (err == -ENODEV) + dev_err(emc->dev, "OPP table not found, please update your device tree\n"); + else + dev_err(emc->dev, "failed to add OPP table: %d\n", err); + + goto put_hw_table; + } + + dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", + hw_version, clk_get_rate(emc->clk) / 1000000); /* first dummy rate-set initializes voltage state */ err = dev_pm_opp_set_rate(emc->dev, clk_get_rate(emc->clk)); @@ -959,11 +952,10 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc) remove_table: dev_pm_opp_of_remove_table(emc->dev); +put_hw_table: + dev_pm_opp_put_supported_hw(hw_opp_table); put_clk_table: dev_pm_opp_put_clkname(clk_opp_table); -put_reg_table: - if (reg_opp_table) - dev_pm_opp_put_regulators(reg_opp_table); return err; } |