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author | 2017-09-04 10:45:28 +0300 | |
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committer | 2017-09-05 14:34:45 -0700 | |
commit | 5d621672bc1a1e5090c1ac5432a18c79e0e13e03 (patch) | |
tree | 22e23d01839dc650354d1196e303fca56f057e42 /drivers/net/ethernet/freescale | |
parent | cxgb4: Ignore MPS_TX_INT_CAUSE[Bubble] for T6 (diff) | |
download | linux-5d621672bc1a1e5090c1ac5432a18c79e0e13e03.tar.gz linux-5d621672bc1a1e5090c1ac5432a18c79e0e13e03.tar.bz2 linux-5d621672bc1a1e5090c1ac5432a18c79e0e13e03.zip |
gianfar: Fix Tx flow control deactivation
The wrong register is checked for the Tx flow control bit,
it should have been maccfg1 not maccfg2.
This went unnoticed for so long probably because the impact is
hardly visible, not to mention the tangled code from adjust_link().
First, link flow control (i.e. handling of Rx/Tx link level pause frames)
is disabled by default (needs to be enabled via 'ethtool -A').
Secondly, maccfg2 always returns 0 for tx_flow_oldval (except for a few
old boards), which results in Tx flow control remaining always on
once activated.
Fixes: 45b679c9a3ccd9e34f28e6ec677b812a860eb8eb ("gianfar: Implement PAUSE frame generation support")
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/freescale')
-rw-r--r-- | drivers/net/ethernet/freescale/gianfar.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index c4b4b0a1bbf0..5be52d89b182 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c @@ -3687,7 +3687,7 @@ static noinline void gfar_update_link_state(struct gfar_private *priv) u32 tempval1 = gfar_read(®s->maccfg1); u32 tempval = gfar_read(®s->maccfg2); u32 ecntrl = gfar_read(®s->ecntrl); - u32 tx_flow_oldval = (tempval & MACCFG1_TX_FLOW); + u32 tx_flow_oldval = (tempval1 & MACCFG1_TX_FLOW); if (phydev->duplex != priv->oldduplex) { if (!(phydev->duplex)) |