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author | 2017-05-25 16:09:34 +0300 | |
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committer | 2017-07-27 16:40:17 +0300 | |
commit | fa3676885e3b5be1edfa1b2cc775e20a45b34a19 (patch) | |
tree | 9e53f1e437573eaef9c9304b74f34d6602d70a18 /drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h | |
parent | net/mlx5: Fix mlx5_ifc_mtpps_reg_bits structure size (diff) | |
download | linux-fa3676885e3b5be1edfa1b2cc775e20a45b34a19.tar.gz linux-fa3676885e3b5be1edfa1b2cc775e20a45b34a19.tar.bz2 linux-fa3676885e3b5be1edfa1b2cc775e20a45b34a19.zip |
net/mlx5e: Add field select to MTPPS register
In order to mark relevant fields while setting the MTPPS register
add field select. Otherwise it can cause a misconfiguration in
firmware.
Fixes: ee7f12205abc ('net/mlx5e: Implement 1PPS support')
Signed-off-by: Eugenia Emantayev <eugenia@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h index 6a3d6bef7dd4..6a263e8d883a 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h @@ -154,6 +154,11 @@ int mlx5_set_mtpps(struct mlx5_core_dev *mdev, u32 *mtpps, u32 mtpps_size); int mlx5_query_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 *arm, u8 *mode); int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode); +#define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \ + MLX5_CAP_GEN((mdev), pps_modify) && \ + MLX5_CAP_MCAM_FEATURE((mdev), mtpps_fs) && \ + MLX5_CAP_MCAM_FEATURE((mdev), mtpps_enh_out_per_adj)) + int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw); void mlx5e_init(void); |