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authorGravatar Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2023-05-27 08:32:07 +0100
committerGravatar Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2023-05-27 08:32:07 +0100
commit0e4daea31d8312dd9f957a62717d4b5f31ef494c (patch)
treea9edacaf51413354d0df35f6faf7f002a6f34bf0 /drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
parentserial: Make uart_remove_one_port() return void (diff)
parentLinux 6.4-rc3 (diff)
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Merge 6.4-rc3 into tty-next
We need the serial/tty fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index afaec3fb9ab6..03b1c5a97826 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -25,6 +25,7 @@ static void dwmac4_core_init(struct mac_device_info *hw,
struct stmmac_priv *priv = netdev_priv(dev);
void __iomem *ioaddr = hw->pcsr;
u32 value = readl(ioaddr + GMAC_CONFIG);
+ u32 clk_rate;
value |= GMAC_CORE_INIT;
@@ -47,6 +48,10 @@ static void dwmac4_core_init(struct mac_device_info *hw,
writel(value, ioaddr + GMAC_CONFIG);
+ /* Configure LPI 1us counter to number of CSR clock ticks in 1us - 1 */
+ clk_rate = clk_get_rate(priv->plat->stmmac_clk);
+ writel((clk_rate / 1000000) - 1, ioaddr + GMAC4_MAC_ONEUS_TIC_COUNTER);
+
/* Enable GMAC interrupts */
value = GMAC_INT_DEFAULT_ENABLE;