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| author |  Vladimir Oltean <vladimir.oltean@nxp.com>
| 2023-06-27 16:42:35 +0300 |
|---|---|---|
| committer |  Jakub Kicinski <kuba@kernel.org>
| 2023-06-27 09:31:51 -0700 |
| commit | 528a08bcd820d07887edeae706df88ceb06db109 (patch) | |
| tree | a2d71280b96fd21bcde0a01da7ff500da9dddafe /drivers/net | |
| parent | Merge branch 'use-vmalloc_array-and-vcalloc' (diff) | |
| download | linux-528a08bcd820d07887edeae706df88ceb06db109.tar.gz linux-528a08bcd820d07887edeae706df88ceb06db109.tar.bz2 linux-528a08bcd820d07887edeae706df88ceb06db109.zip | |
net: phy: mscc: fix packet loss due to RGMII delays
Two deadly typos break RX and TX traffic on the VSC8502 PHY using RGMII
if phy-mode = "rgmii-id" or "rgmii-txid", and no "tx-internal-delay-ps"
override exists. The negative error code from phy_get_internal_delay()
does not get overridden with the delay deduced from the phy-mode, and
later gets committed to hardware. Also, the rx_delay gets overridden by
what should have been the tx_delay.
Fixes: dbb050d2bfc8 ("phy: mscc: Add support for RGMII delay configuration")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Harini Katakam <harini.katakam@amd.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Link: https://lore.kernel.org/r/20230627134235.3453358-1-vladimir.oltean@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/phy/mscc/mscc_main.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c index 669a4a7a28ce..4171f01d34e5 100644 --- a/drivers/net/phy/mscc/mscc_main.c +++ b/drivers/net/phy/mscc/mscc_main.c @@ -563,9 +563,9 @@ static int vsc85xx_update_rgmii_cntl(struct phy_device *phydev, u32 rgmii_cntl, if (tx_delay < 0) { if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) - rx_delay = RGMII_CLK_DELAY_2_0_NS; + tx_delay = RGMII_CLK_DELAY_2_0_NS; else - rx_delay = RGMII_CLK_DELAY_0_2_NS; + tx_delay = RGMII_CLK_DELAY_0_2_NS; } reg_val |= rx_delay << rgmii_rx_delay_pos; |