diff options
| author |  Geert Uytterhoeven <geert+renesas@glider.be>
| 2023-09-22 09:53:11 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be>
| 2023-09-26 09:44:51 +0200 |
| commit | c385256611b1af79d180e35c07992b43e1be5067 (patch) | |
| tree | ed743c3c51360e40f69c9d1241694e4d84af2c2c /drivers/pinctrl/renesas | |
| parent | pinctrl: renesas: rzg2l: Make reverse order of enable() for disable() (diff) | |
| download | linux-c385256611b1af79d180e35c07992b43e1be5067.tar.gz linux-c385256611b1af79d180e35c07992b43e1be5067.tar.bz2 linux-c385256611b1af79d180e35c07992b43e1be5067.zip | |
pinctrl: renesas: rzg2l: Rename rzg2l_gpio_configs[]
The rzg2l_gpio_configs array is really related to the RZ/G2L (R9A07G044)
Soc only. Hence rename it to r9a07g044_gpio_configs[].
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/19958e63a2b793be5182640c4301ec5a77a507f6.1695369116.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl/renesas')
| -rw-r--r-- | drivers/pinctrl/renesas/pinctrl-rzg2l.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 23c2a1044089..03b36c6b2b6d 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -985,7 +985,7 @@ static const char * const rzg2l_gpio_names[] = { "P48_0", "P48_1", "P48_2", "P48_3", "P48_4", "P48_5", "P48_6", "P48_7", }; -static const u32 rzg2l_gpio_configs[] = { +static const u32 r9a07g044_gpio_configs[] = { RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS), @@ -1485,7 +1485,7 @@ static int rzg2l_pinctrl_probe(struct platform_device *pdev) struct clk *clk; int ret; - BUILD_BUG_ON(ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT > + BUILD_BUG_ON(ARRAY_SIZE(r9a07g044_gpio_configs) * RZG2L_PINS_PER_PORT > ARRAY_SIZE(rzg2l_gpio_names)); BUILD_BUG_ON(ARRAY_SIZE(r9a07g043_gpio_configs) * RZG2L_PINS_PER_PORT > @@ -1535,10 +1535,10 @@ static struct rzg2l_pinctrl_data r9a07g043_data = { static struct rzg2l_pinctrl_data r9a07g044_data = { .port_pins = rzg2l_gpio_names, - .port_pin_configs = rzg2l_gpio_configs, - .n_ports = ARRAY_SIZE(rzg2l_gpio_configs), + .port_pin_configs = r9a07g044_gpio_configs, + .n_ports = ARRAY_SIZE(r9a07g044_gpio_configs), .dedicated_pins = rzg2l_dedicated_pins.common, - .n_port_pins = ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT, + .n_port_pins = ARRAY_SIZE(r9a07g044_gpio_configs) * RZG2L_PINS_PER_PORT, .n_dedicated_pins = ARRAY_SIZE(rzg2l_dedicated_pins.common) + ARRAY_SIZE(rzg2l_dedicated_pins.rzg2l_pins), }; |