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authorGravatar Samuel Holland <samuel@sholland.org> 2022-05-31 00:36:21 -0500
committerGravatar Linus Walleij <linus.walleij@linaro.org> 2022-06-15 15:54:37 +0200
commit59c150252786fe428aa541e24e9bef8c6dc4deb4 (patch)
treeee42c01d60368716093dc05a013ab1abe0a35c70 /drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
parentdt-bindings: pinctrl: mt8192: Use generic bias instead of pull-*-adv (diff)
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pinctrl: sunxi: Remove reset controller consumers
None of the sunxi pin controllers have a module reset line. All of the SoC documentation, where available, agrees. The bits that would be used for the PIO reset (i.e. matching the order of the clock gate bits) are always reserved, both in the CCU and in the PRCM. And experiments on several SoCs, including the A33, confirm that those reserved bits indeed have no effect. Let's remove this superfluous code and dependency, and also remove the include statement that was copied to the other r_pio drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220531053623.43851-2-samuel@sholland.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
index 8e4f10ab96ce..c39ea46046c2 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
@@ -12,7 +12,6 @@
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>
-#include <linux/reset.h>
#include "pinctrl-sunxi.h"