diff options
| author |  Icenowy Zheng <icenowy@aosc.xyz>
| 2016-07-04 10:29:31 +0800 |
|---|---|---|
| committer |  Linus Walleij <linus.walleij@linaro.org>
| 2016-07-05 15:45:55 +0200 |
| commit | bc0f566a98c47a75dff3a759c904e99da5937984 (patch) | |
| tree | 821e39d34ece1881e4bdf8cd2d4b1377109e8164 /drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | |
| parent | pinctrl: uniphier: remove pointless pin-mux settings for PH1-LD11 (diff) | |
| download | linux-bc0f566a98c47a75dff3a759c904e99da5937984.tar.gz linux-bc0f566a98c47a75dff3a759c904e99da5937984.tar.bz2 linux-bc0f566a98c47a75dff3a759c904e99da5937984.zip | |
pinctrl: sunxi: fix nand0 function name for sun8i
In sun4/5/6/7i, all the pin function related to NAND0 controller is
named "nand0". However, in sun8i, some of the functions are named as
"nand". This patch renamed them to "nand0", for the consistency.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c')
| -rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c index 55083d278bb1..ce483b03a263 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c @@ -180,17 +180,17 @@ static const struct sunxi_desc_pin sun8i_a23_pins[] = { SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), - SUNXI_FUNCTION(0x2, "nand"), /* DQ6 */ + SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */ SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), - SUNXI_FUNCTION(0x2, "nand"), /* DQ7 */ + SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */ SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), - SUNXI_FUNCTION(0x2, "nand"), /* DQS */ + SUNXI_FUNCTION(0x2, "nand0"), /* DQS */ SUNXI_FUNCTION(0x3, "mmc2")), /* RST */ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17), SUNXI_FUNCTION(0x0, "gpio_in"), |