diff options
| author |  Geert Uytterhoeven <geert+renesas@glider.be>
| 2022-05-18 16:41:42 +0200 |
|---|---|---|
| committer |  Linus Walleij <linus.walleij@linaro.org>
| 2022-05-19 15:16:29 +0200 |
| commit | 48bd5c381c4a750bf486360536f4274c10b9ca35 (patch) | |
| tree | c21da69a9f049a47c0110fc2a4b9bfc477ac9270 /drivers/pinctrl | |
| parent | pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10 (diff) | |
| download | linux-48bd5c381c4a750bf486360536f4274c10b9ca35.tar.gz linux-48bd5c381c4a750bf486360536f4274c10b9ca35.tar.bz2 linux-48bd5c381c4a750bf486360536f4274c10b9ca35.zip | |
pinctrl: starfive: Make the irqchip immutable
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips. Following this change the following warning is
now observed for the starfive driver:
gpio gpiochip0: (11910000.pinctrl): not an immutable chip, please consider fixing it!
Fix this by making the irqchip in the starfive driver immutable.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5eb66be34356afd5eb0ea9027329e0939d03d3a0.1652884852.git.geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/pinctrl-starfive.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/pinctrl/pinctrl-starfive.c b/drivers/pinctrl/pinctrl-starfive.c index c586cfd09fa8..2a86c1035cc8 100644 --- a/drivers/pinctrl/pinctrl-starfive.c +++ b/drivers/pinctrl/pinctrl-starfive.c @@ -1074,6 +1074,8 @@ static void starfive_irq_mask(struct irq_data *d) value = readl_relaxed(ie) & ~mask; writel_relaxed(value, ie); raw_spin_unlock_irqrestore(&sfp->lock, flags); + + gpiochip_disable_irq(&sfp->gc, d->hwirq); } static void starfive_irq_mask_ack(struct irq_data *d) @@ -1102,6 +1104,8 @@ static void starfive_irq_unmask(struct irq_data *d) unsigned long flags; u32 value; + gpiochip_enable_irq(&sfp->gc, d->hwirq); + raw_spin_lock_irqsave(&sfp->lock, flags); value = readl_relaxed(ie) | mask; writel_relaxed(value, ie); @@ -1163,14 +1167,15 @@ static int starfive_irq_set_type(struct irq_data *d, unsigned int trigger) return 0; } -static struct irq_chip starfive_irq_chip = { +static const struct irq_chip starfive_irq_chip = { .name = "StarFive GPIO", .irq_ack = starfive_irq_ack, .irq_mask = starfive_irq_mask, .irq_mask_ack = starfive_irq_mask_ack, .irq_unmask = starfive_irq_unmask, .irq_set_type = starfive_irq_set_type, - .flags = IRQCHIP_SET_TYPE_MASKED, + .flags = IRQCHIP_IMMUTABLE | IRQCHIP_SET_TYPE_MASKED, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; static void starfive_gpio_irq_handler(struct irq_desc *desc) @@ -1308,7 +1313,7 @@ static int starfive_probe(struct platform_device *pdev) sfp->gc.base = -1; sfp->gc.ngpio = NR_GPIOS; - sfp->gc.irq.chip = &starfive_irq_chip; + gpio_irq_chip_set_chip(&sfp->gc.irq, &starfive_irq_chip); sfp->gc.irq.parent_handler = starfive_gpio_irq_handler; sfp->gc.irq.num_parents = 1; sfp->gc.irq.parents = devm_kcalloc(dev, sfp->gc.irq.num_parents, |