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authorGravatar Prashant Malani <pmalani@chromium.org> 2023-05-08 18:34:27 +0000
committerGravatar Prashant Malani <pmalani@chromium.org> 2023-05-11 21:17:53 +0000
commitc9f9c6c875d14a107dabcf4579fcab95ed30af31 (patch)
tree4423be6e3021d6805d91cf065b695e5065fd5dac /drivers/platform/chrome/cros_hps_i2c.c
parentLinux 6.4-rc1 (diff)
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platform/chrome: cros_typec_switch: Add Pin D support
The ChromeOS EC's mux interface allows us to specify whether the port should be configured for Pin Assignment D in DisplayPort alternate mode (i.e 2 lanes USB + 2 lanes DP). Update the function that determines mux state to account for Pin Assignment D and return the appropriate mux setting. Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Prashant Malani <pmalani@chromium.org> Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Link: https://lore.kernel.org/r/20230508183428.1893357-1-pmalani@chromium.org
Diffstat (limited to 'drivers/platform/chrome/cros_hps_i2c.c')
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