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author | 2019-04-01 13:29:13 +0530 | |
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committer | 2019-04-05 10:24:49 +0700 | |
commit | 67dca5e580f1e93a66177389981541cac208c817 (patch) | |
tree | aa738028425b7a9ce93fbac1ca0223156be0e3a7 /drivers/spi/Kconfig | |
parent | dt-bindings: spi: Add device tree binding documentation for Zynq QSPI controller (diff) | |
download | linux-67dca5e580f1e93a66177389981541cac208c817.tar.gz linux-67dca5e580f1e93a66177389981541cac208c817.tar.bz2 linux-67dca5e580f1e93a66177389981541cac208c817.zip |
spi: spi-mem: Add support for Zynq QSPI controller
Add support for QSPI controller driver used by Xilinx Zynq SOC.
Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/Kconfig')
-rw-r--r-- | drivers/spi/Kconfig | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 8ce4f7df0ef2..0fba8f400c59 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -848,9 +848,17 @@ config SPI_XTENSA_XTFPGA 16 bit words in SPI mode 0, automatically asserting CS on transfer start and deasserting on end. +config SPI_ZYNQ_QSPI + tristate "Xilinx Zynq QSPI controller" + depends on ARCH_ZYNQ || COMPILE_TEST + help + This enables support for the Zynq Quad SPI controller + in master mode. + This controller only supports SPI memory interface. + config SPI_ZYNQMP_GQSPI tristate "Xilinx ZynqMP GQSPI controller" - depends on SPI_MASTER && HAS_DMA + depends on (SPI_MASTER && HAS_DMA) || COMPILE_TEST help Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. |