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author | 2020-05-29 21:31:50 +0300 | |
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committer | 2020-05-29 20:04:04 +0100 | |
commit | 3d7db0f11c7ad19979a1a01cac1d379ff040e886 (patch) | |
tree | 858ee5df1e7e69b483c3444c15540c406d111245 /drivers/spi/spi-dw-dma.c | |
parent | spi: dw: Make DMA request line assignments explicit for Intel Medfield (diff) | |
download | linux-3d7db0f11c7ad19979a1a01cac1d379ff040e886.tar.gz linux-3d7db0f11c7ad19979a1a01cac1d379ff040e886.tar.bz2 linux-3d7db0f11c7ad19979a1a01cac1d379ff040e886.zip |
spi: dw: Refactor mid_spi_dma_setup() to separate DMA and IRQ config
It's better to understand what bits are set for DMA and for IRQ handling
in mid_spi_dma_setup() if they are grouped accordingly. Thus,
refactor mid_spi_dma_setup() to separate DMA and IRQ configuration.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200529183150.44149-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-dw-dma.c')
-rw-r--r-- | drivers/spi/spi-dw-dma.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index 53d5257662e8..5986c520b196 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -375,17 +375,17 @@ static int dw_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer) dw_writel(dws, DW_SPI_DMARDLR, dws->rxburst - 1); dw_writel(dws, DW_SPI_DMATDLR, dws->fifo_len - dws->txburst); - if (xfer->tx_buf) { + if (xfer->tx_buf) dma_ctrl |= SPI_DMA_TDMAE; - imr |= SPI_INT_TXOI; - } - if (xfer->rx_buf) { + if (xfer->rx_buf) dma_ctrl |= SPI_DMA_RDMAE; - imr |= SPI_INT_RXUI | SPI_INT_RXOI; - } dw_writel(dws, DW_SPI_DMACR, dma_ctrl); /* Set the interrupt mask */ + if (xfer->tx_buf) + imr |= SPI_INT_TXOI; + if (xfer->rx_buf) + imr |= SPI_INT_RXUI | SPI_INT_RXOI; spi_umask_intr(dws, imr); reinit_completion(&dws->dma_completion); |