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author | 2020-02-21 12:11:54 +0200 | |
---|---|---|
committer | 2020-09-03 12:06:41 +0300 | |
commit | 341d45188a7800ae3bc18558d62020787b78397e (patch) | |
tree | 3d9b8877c304c845f3f7c94820eb7c89b0cb2a07 /drivers | |
parent | thunderbolt: Configure port for XDomain (diff) | |
download | linux-341d45188a7800ae3bc18558d62020787b78397e.tar.gz linux-341d45188a7800ae3bc18558d62020787b78397e.tar.bz2 linux-341d45188a7800ae3bc18558d62020787b78397e.zip |
thunderbolt: Disable lane 1 for XDomain connection
USB4 spec mandates that the lane 1 should be disabled if lanes are not
bonded. For host-to-host connections (XDomain) we don't support lane
bonding so in order to be compatible with the spec, disable lane 1 when
another host is connected.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/thunderbolt/switch.c | 44 | ||||
-rw-r--r-- | drivers/thunderbolt/tb.c | 8 | ||||
-rw-r--r-- | drivers/thunderbolt/tb.h | 2 | ||||
-rw-r--r-- | drivers/thunderbolt/tb_regs.h | 1 |
4 files changed, 55 insertions, 0 deletions
diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c index 50d2af5ba491..37a81206636f 100644 --- a/drivers/thunderbolt/switch.c +++ b/drivers/thunderbolt/switch.c @@ -673,6 +673,50 @@ int tb_port_unlock(struct tb_port *port) return 0; } +static int __tb_port_enable(struct tb_port *port, bool enable) +{ + int ret; + u32 phy; + + if (!tb_port_is_null(port)) + return -EINVAL; + + ret = tb_port_read(port, &phy, TB_CFG_PORT, + port->cap_phy + LANE_ADP_CS_1, 1); + if (ret) + return ret; + + if (enable) + phy &= ~LANE_ADP_CS_1_LD; + else + phy |= LANE_ADP_CS_1_LD; + + return tb_port_write(port, &phy, TB_CFG_PORT, + port->cap_phy + LANE_ADP_CS_1, 1); +} + +/** + * tb_port_enable() - Enable lane adapter + * @port: Port to enable (can be %NULL) + * + * This is used for lane 0 and 1 adapters to enable it. + */ +int tb_port_enable(struct tb_port *port) +{ + return __tb_port_enable(port, true); +} + +/** + * tb_port_disable() - Disable lane adapter + * @port: Port to disable (can be %NULL) + * + * This is used for lane 0 and 1 adapters to disable it. + */ +int tb_port_disable(struct tb_port *port) +{ + return __tb_port_enable(port, false); +} + /** * tb_init_port() - initialize a port * diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index 602e00e0b45e..214e47656be6 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -142,6 +142,12 @@ static void tb_discover_tunnels(struct tb_switch *sw) static int tb_port_configure_xdomain(struct tb_port *port) { + /* + * XDomain paths currently only support single lane so we must + * disable the other lane according to USB4 spec. + */ + tb_port_disable(port->dual_link_port); + if (tb_switch_is_usb4(port->sw)) return usb4_port_configure_xdomain(port); return tb_lc_configure_xdomain(port); @@ -153,6 +159,8 @@ static void tb_port_unconfigure_xdomain(struct tb_port *port) usb4_port_unconfigure_xdomain(port); else tb_lc_unconfigure_xdomain(port); + + tb_port_enable(port->dual_link_port); } static void tb_scan_xdomain(struct tb_port *port) diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index c80b11dba756..e8593cf5901a 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -790,6 +790,8 @@ int tb_port_add_nfc_credits(struct tb_port *port, int credits); int tb_port_set_initial_credits(struct tb_port *port, u32 credits); int tb_port_clear_counter(struct tb_port *port, int counter); int tb_port_unlock(struct tb_port *port); +int tb_port_enable(struct tb_port *port); +int tb_port_disable(struct tb_port *port); int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid); void tb_port_release_in_hopid(struct tb_port *port, int hopid); int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid); diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h index a553be24f1c0..d1a40baa63d2 100644 --- a/drivers/thunderbolt/tb_regs.h +++ b/drivers/thunderbolt/tb_regs.h @@ -279,6 +279,7 @@ struct tb_regs_port_header { #define LANE_ADP_CS_1_TARGET_WIDTH_SHIFT 4 #define LANE_ADP_CS_1_TARGET_WIDTH_SINGLE 0x1 #define LANE_ADP_CS_1_TARGET_WIDTH_DUAL 0x3 +#define LANE_ADP_CS_1_LD BIT(14) #define LANE_ADP_CS_1_LB BIT(15) #define LANE_ADP_CS_1_CURRENT_SPEED_MASK GENMASK(19, 16) #define LANE_ADP_CS_1_CURRENT_SPEED_SHIFT 16 |