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author | 2019-12-16 15:27:08 +0530 | |
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committer | 2020-01-08 12:58:06 +0530 | |
commit | a43f72ae136a816a3cceab8957dd3aa301263281 (patch) | |
tree | 2ac30771a7c2e96eb7158423152506017a314524 /drivers | |
parent | phy: cadence: Sierra: Check for PLL lock during PHY power on (diff) | |
download | linux-a43f72ae136a816a3cceab8957dd3aa301263281.tar.gz linux-a43f72ae136a816a3cceab8957dd3aa301263281.tar.bz2 linux-a43f72ae136a816a3cceab8957dd3aa301263281.zip |
phy: cadence: Sierra: Change MAX_LANES of Sierra to 16
Sierra SERDES IP supports upto 16 lanes (though not all of it
will be enabled in a platform). Allow Sierra driver to support a
maximum of upto 16 lanes.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/phy/cadence/phy-cadence-sierra.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 62bff4b043f0..665a6dbc7816 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -141,7 +141,7 @@ #define SIERRA_PHY_PLL_CFG 0xe #define SIERRA_MACRO_ID 0x00007364 -#define SIERRA_MAX_LANES 4 +#define SIERRA_MAX_LANES 16 #define PLL_LOCK_TIME 100000 static const struct reg_field macro_id_type = @@ -199,6 +199,7 @@ struct cdns_sierra_phy { struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES]; struct clk *clk; int nsubnodes; + u32 num_lanes; bool autoconf; }; @@ -235,6 +236,18 @@ static struct regmap_config cdns_sierra_lane_cdb_config[] = { SIERRA_LANE_CDB_REGMAP_CONF("1"), SIERRA_LANE_CDB_REGMAP_CONF("2"), SIERRA_LANE_CDB_REGMAP_CONF("3"), + SIERRA_LANE_CDB_REGMAP_CONF("4"), + SIERRA_LANE_CDB_REGMAP_CONF("5"), + SIERRA_LANE_CDB_REGMAP_CONF("6"), + SIERRA_LANE_CDB_REGMAP_CONF("7"), + SIERRA_LANE_CDB_REGMAP_CONF("8"), + SIERRA_LANE_CDB_REGMAP_CONF("9"), + SIERRA_LANE_CDB_REGMAP_CONF("10"), + SIERRA_LANE_CDB_REGMAP_CONF("11"), + SIERRA_LANE_CDB_REGMAP_CONF("12"), + SIERRA_LANE_CDB_REGMAP_CONF("13"), + SIERRA_LANE_CDB_REGMAP_CONF("14"), + SIERRA_LANE_CDB_REGMAP_CONF("15"), }; static struct regmap_config cdns_sierra_common_cdb_config = { @@ -548,6 +561,8 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) } } + sp->num_lanes += sp->phys[node].num_lanes; + gphy = devm_phy_create(dev, child, &ops); if (IS_ERR(gphy)) { @@ -561,6 +576,11 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) } sp->nsubnodes = node; + if (sp->num_lanes > SIERRA_MAX_LANES) { + dev_err(dev, "Invalid lane configuration\n"); + goto put_child2; + } + /* If more than one subnode, configure the PHY as multilink */ if (!sp->autoconf && sp->nsubnodes > 1) regmap_field_write(sp->phy_pll_cfg_1, 0x1); |