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author | 2017-07-18 19:27:55 +0800 | |
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committer | 2019-06-20 15:54:56 -0500 | |
commit | 852a6626d5fdd5dd442e6c6ab51ce0cb022d75b4 (patch) | |
tree | 4f1ca13ebd888b6567b8a09fca3cdc285b8a7035 /include/drm | |
parent | drm/amdgpu: add navi10 ip offset header (diff) | |
download | linux-852a6626d5fdd5dd442e6c6ab51ce0cb022d75b4.tar.gz linux-852a6626d5fdd5dd442e6c6ab51ce0cb022d75b4.tar.bz2 linux-852a6626d5fdd5dd442e6c6ab51ce0cb022d75b4.zip |
drm/amdgpu: add navi10 asic type
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm')
-rw-r--r-- | include/drm/amd_asic_type.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h index dd63d08cc54e..bcc2bcf32886 100644 --- a/include/drm/amd_asic_type.h +++ b/include/drm/amd_asic_type.h @@ -49,6 +49,7 @@ enum amd_asic_type { CHIP_VEGA12, CHIP_VEGA20, CHIP_RAVEN, + CHIP_NAVI10, CHIP_LAST, }; |