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author | 2006-01-11 22:44:24 +0100 | |
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committer | 2006-01-11 19:04:54 -0800 | |
commit | d25bf7e5fe73b5b6d2246ab0be08ae35d718456b (patch) | |
tree | 472749fef9b017e9a4d94f9e07a29dc44c3294cb /include | |
parent | [PATCH] i386: Handle missing local APIC timer interrupts on C3 state (diff) | |
download | linux-d25bf7e5fe73b5b6d2246ab0be08ae35d718456b.tar.gz linux-d25bf7e5fe73b5b6d2246ab0be08ae35d718456b.tar.bz2 linux-d25bf7e5fe73b5b6d2246ab0be08ae35d718456b.zip |
[PATCH] x86_64: Handle missing local APIC timer interrupts on C3 state
Whenever we see that a CPU is capable of C3 (during ACPI cstate init), we
disable local APIC timer and switch to using a broadcast from external timer
interrupt (IRQ 0).
Patch below adds the code for x86_64.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-x86_64/apic.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h index 5647b7de1749..1768ce719156 100644 --- a/include/asm-x86_64/apic.h +++ b/include/asm-x86_64/apic.h @@ -113,6 +113,12 @@ extern int disable_timer_pin_1; extern void setup_threshold_lvt(unsigned long lvt_off); +void smp_send_timer_broadcast_ipi(void); +void switch_APIC_timer_to_ipi(void *cpumask); +void switch_ipi_to_APIC_timer(void *cpumask); + +#define ARCH_APICTIMER_STOPS_ON_C3 1 + #endif /* CONFIG_X86_LOCAL_APIC */ extern unsigned boot_cpu_id; |