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authorGravatar Dmitry Osipenko <digetx@gmail.com> 2019-05-02 02:38:03 +0300
committerGravatar MyungJoo Ham <myungjoo.ham@samsung.com> 2019-08-24 20:11:12 +0900
commit30af44fae8bdccfb21a45dfb4029f954f618d2e3 (patch)
tree4653b44e81bbf89304bb673a4a0525d81438015a /mm
parentPM / devfreq: tegra: Replace write memory barrier with the read barrier (diff)
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PM / devfreq: tegra: Don't ignore clk errors
The clk_set_min_rate() could fail and in this case clk_set_rate() sets rate to 0, which may drop EMC rate to minimum and make machine very difficult to use. Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
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