diff options
| author |  Shiqi Liu <shiqiliu@hust.edu.cn>
| 2024-04-21 14:33:28 +0800 |
|---|---|---|
| committer |  Will Deacon <will@kernel.org>
| 2024-04-28 08:28:27 +0100 |
| commit | 12d712dc8e4f1a30b18f8c3789adfbc07f5eb050 (patch) | |
| tree | 5536cda0155aa7d8322bcc6e01abc59178afaf60 /tools/arch | |
| parent | arm64: Add Neoverse-V2 part (diff) | |
| download | linux-12d712dc8e4f1a30b18f8c3789adfbc07f5eb050.tar.gz linux-12d712dc8e4f1a30b18f8c3789adfbc07f5eb050.tar.bz2 linux-12d712dc8e4f1a30b18f8c3789adfbc07f5eb050.zip | |
arm64/sysreg: Update PIE permission encodings
Fix left shift overflow issue when the parameter idx is greater than or
equal to 8 in the calculation of perm in PIRx_ELx_PERM macro.
Fix this by modifying the encoding to use a long integer type.
Signed-off-by: Shiqi Liu <shiqiliu@hust.edu.cn>
Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20240421063328.29710-1-shiqiliu@hust.edu.cn
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'tools/arch')
| -rw-r--r-- | tools/arch/arm64/include/asm/sysreg.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/tools/arch/arm64/include/asm/sysreg.h b/tools/arch/arm64/include/asm/sysreg.h index ccc13e991376..cd8420e8c3ad 100644 --- a/tools/arch/arm64/include/asm/sysreg.h +++ b/tools/arch/arm64/include/asm/sysreg.h @@ -701,18 +701,18 @@ * Permission Indirection Extension (PIE) permission encodings. * Encodings with the _O suffix, have overlays applied (Permission Overlay Extension). */ -#define PIE_NONE_O 0x0 -#define PIE_R_O 0x1 -#define PIE_X_O 0x2 -#define PIE_RX_O 0x3 -#define PIE_RW_O 0x5 -#define PIE_RWnX_O 0x6 -#define PIE_RWX_O 0x7 -#define PIE_R 0x8 -#define PIE_GCS 0x9 -#define PIE_RX 0xa -#define PIE_RW 0xc -#define PIE_RWX 0xe +#define PIE_NONE_O UL(0x0) +#define PIE_R_O UL(0x1) +#define PIE_X_O UL(0x2) +#define PIE_RX_O UL(0x3) +#define PIE_RW_O UL(0x5) +#define PIE_RWnX_O UL(0x6) +#define PIE_RWX_O UL(0x7) +#define PIE_R UL(0x8) +#define PIE_GCS UL(0x9) +#define PIE_RX UL(0xa) +#define PIE_RW UL(0xc) +#define PIE_RWX UL(0xe) #define PIRx_ELx_PERM(idx, perm) ((perm) << ((idx) * 4)) |